EX-403 · Digital Electronics Logic Design/Unsolved PYQ Paper
EX-403 Digital Electronics and Logic Design (DELD) - Jun 2024 Question Paper
Under each question, How to answer lists the points an answer should cover, outlined by CampusPrep from the syllabus. Check the details against your textbook.
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7 MarksaConvert the following to Binary and then to gray code
- i)$(AB33)_{16}$
- ii)$(3323)_{8}$
- iii)$(83.625)_{10}$
How to answer
- Convert each given number to binary (hex to 4-bit, octal to 3-bit, decimal fraction by repeated multiply)
- Write binary equivalents
- Convert binary to Gray code using G MSB = B MSB, Gi = Bi xor Bi+1
- List final Gray codes
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7 MarksbSimplify the following Boolean functions using Karnaugh map: $F(w, x, y, z) = \Sigma m(0, 1, 2, 4, 5, 12, 13, 14) + \Sigma d(6, 8, 9).$
How to answer
- Plot 4-variable K-map with minterms 0,1,2,4,5,12,13,14 and don't cares 6,8,9
- Form largest groups of 1s using don't cares
- Write prime implicants
- Give minimized SOP expression
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7 MarksaDemonstrate by means of truth tables the validity of the De Morgan's theorems for three variables. Find the complement of $F = a(b'c'+bc)$ by applying De Morgan's theorem as many times as necessary.
How to answer
- State De Morgan's theorems for three variables
- Construct 8-row truth tables for LHS and RHS of both theorems
- Show LHS = RHS to prove validity
- Apply repeated complementation to find complement of F = a(b'c'+bc)
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7 MarksbWhat is the need of full adder circuit. Design a Full adder circuit with truth table and logic diagram.
How to answer
- Explain need for full adder: addition of two bits with carry-in
- Give truth table for 3 inputs A,B,Cin and outputs Sum, Cout
- Derive Sum = A xor B xor Cin and Cout expressions
- Show logic diagram using XOR, AND, OR gates
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7 MarksaImplement Boolean function $F(A, B, C, D) = \Sigma m(0, 1, 3, 4, 8, 9, 15)$ using 8:1 multiplexer.
How to answer
- Take A,B,C as select lines and D as MUX input variable
- List minterms 0,1,3,4,8,9,15 in truth table
- Derive 8 MUX data inputs D0-D7 as function of D
- Show 8:1 multiplexer connection diagram
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7 MarksbWhat do you understand by Universal Gates. Realize the NOT, AND, OR, XOR and X-NOR Gates using NAND gates only?
How to answer
- Define universal gates: NAND and NOR can realize any function
- Show NOT, AND, OR using NAND only
- Show XOR and X-NOR using NAND only
- Give logic diagrams for each realization
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7 MarksaWhat is Latch? What are the difference between Latch and Flip Flop? Explain D latch with truth table and logic diagram.
How to answer
- Define latch as level-sensitive bistable element
- Compare latch vs flip-flop on clocking, transparency, edge vs level
- Explain D latch operation and truth table
- Show logic diagram using NAND/NOR or SR with enable
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7 MarksbExplain the working principle of J-K flip flop with its Truth Table and Suitable circuit diagram.
How to answer
- Give J-K flip-flop logic symbol and NAND-based circuit
- Explain J,K = 00 hold, 01 reset, 10 set, 11 toggle
- Present truth/characteristic table and excitation
- Explain race-around and master-slave remedy if applicable
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7 MarksaDerive the State Table and State Diagram for the sequential circuit as shown in figure below.
Given: Given sequential circuit with two JK flip-flops labelled A and B. Inputs: x and A. Flip-flop A has JA from AND of x and B? Actually AND gate with inputs x and B? driving JA, CP clock, KA = A? Flip-flop B has JB from AND of x and A-bar? KB = B? Outputs B and B-bar. Additional AND gate with inputs x, A? and B? driving output y. Clock CP common. Feedback connections from Q and Q-bar. How to answer
- Derive JA,KA,JB,KB input equations from AND gates and present state
- Use J-K characteristic to get next state A+,B+ for all A,B,x
- Construct state table including output y
- Draw state diagram with transitions labelled x/y
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7 MarksbDesign a synchronous counter with the following repeated binary sequence: 0, 1, 2, 3, 4, 5, 6, use JK flip-flops.
How to answer
- Determine number of flip-flops for states 0-6 (3 JK FFs)
- Draw state diagram for 0 to 6 sequence and excitation table
- Derive J,K equations via K-maps
- Show counter logic diagram
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7 MarksaDescribe shift registers and explain 4-bit bidirectional shift register with parallel load.
How to answer
- Define shift register and shift modes
- Explain bidirectional shifting with control
- Describe 4-bit register with parallel load inputs
- Give block/logic diagram and operation table
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7 MarksbWhat do you understand by counter. Explain the working of Johnson counter with suitable diagram.
How to answer
- Define counter and classification
- Explain Johnson/twisted ring principle with feedback inversion
- Show 4-bit Johnson sequence of 8 states and timing
- Give circuit diagram using D/JK flip-flops
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7 MarksaWhat do you understand by Read-Only-Memory. Explain different types ROMs.
How to answer
- Define ROM as non-volatile combinational memory
- Explain address, data, organization
- Classify mask ROM, PROM, EPROM, EEPROM, Flash
- Compare programming/erasing features
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7 MarksbA combinational circuit is defined by the functions: $F_{1} = m (3, 5, 7)$ $F_{2} = m (4, 5, 7)$ Implement the circuit with a PLA having 3 inputs, 3 product terms and two outputs.
How to answer
- Express F1 = m(3,5,7), F2 = m(4,5,7) in terms of 3 variables
- Find common product term 101? Actually minterm 5 common, minimize to 3 product terms
- Assign AND-plane fuses for 3 product terms
- Show PLA diagram with 3 inputs, 3 ANDs, 2 ORs
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14 MarksWrite a short note on any two :
- a)Priority Encoder
- b)Decoding in Counter
- c)Programmable Array Logic (PAL)
- d)Successive Approximation A/D Converter
How to answer
- Select any two topics from four options
- Give definition/principle and block diagram for each
- Mention key features/applications
- Conclude with uses in digital systems
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