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EC-303 · DIGITAL SYSTEM DESIGN/Unsolved PYQ Paper

EC-303 Digital System Design - Jun 2023 Question Paper

Under each question, How to answer lists the points an answer should cover, outlined by CampusPrep from the syllabus. Check the details against your textbook.

  1. 8 Marks
    aConvert the following binary numbers into decimal, octal and hexadecimal:
    1. i)111100001101
    2. ii)111. 0111
    How to answer
    • Group bits for octal (3-bit) and hex (4-bit) conversion
    • Convert integer and fractional parts to decimal using positional weights
    • Show decimal, octal and hexadecimal equivalents for both numbers
  2. 6 Marks
    bState and prove Demorgan's theorem.
    How to answer
    • State both De Morgan's theorems with Boolean equations
    • Prove using truth table for two variables
    • Prove algebraically using duality / perfect induction
    • Show NAND-NOR equivalence diagram
  3. 7 Marks
    aSimplify the following using quine-mccluskey method? $f(w, x, y, z)= \Sigma m(0, 1, 3, 9, 10, 12, 13, 14)+\Sigma d(2, 5, 6, 11)$
    How to answer
    • List minterms and don't cares and group by number of 1s
    • Tabulate prime implicants by Quine-McCluskey iterative combining
    • Select essential prime implicants via prime implicant chart
    • Write minimal SOP expression
  4. 7 Marks
    bDesign one full adder using two half adders.
    How to answer
    • Define half adder and full adder equations
    • Show two half adders plus OR gate connection for carry
    • Draw block diagram / logic diagram
    • Verify sum and carry truth table
  5. 6 Marks
    aDesign and explain a 4-bit priority encoder.
    How to answer
    • Define priority encoder and priority resolution
    • Give truth table for 4-bit priority encoder
    • Derive output and valid equations
    • Draw logic diagram
  6. 8 Marks
    bDesign and explain a 16:1 mux using 2:1 mux.
    How to answer
    • Explain 2:1 mux as building block
    • Show tree structure to expand to 16:1 using multiple stages
    • Calculate number of 2:1 muxes required
    • Draw block diagram and explain select lines
  7. 6 Marks
    aWrite a short notes on JK flip-flop.
    How to answer
    • Give symbol, logic diagram and truth/characteristic table
    • Explain J-K operation including toggle and race-around
    • Give characteristic and excitation equations
  8. 8 Marks
    bWhat are the basic elements used in ASM chart explain in detail?
    How to answer
    • Define ASM chart purpose
    • Explain state box, decision box and conditional output box
    • Explain timing and linkage with examples
    • Draw symbols for basic elements
  9. 9 Marks
    aDesign a modulo-6 counter which counts in the sequence $0, 1, 2, 3, 4, 5, 0, 1..........$ The counter counts the clock pulses if it's enable input is equal to 1, using D flip-flop.
    How to answer
    • Draw state diagram for 0-5 sequence with enable
    • Derive D flip-flop excitation and input equations
    • Draw logic diagram using D flip-flops
    • Explain counting with enable=1 and reset after 5
  10. 5 Marks
    bExplain difference between the synchronous and asynchronous counters.
    How to answer
    • Define synchronous vs asynchronous clocking
    • Compare speed, complexity, power and decoding
    • Give examples of each counter type
    • Summarize in table form
  11. 6 Marks
    aDesign and explain the working of 4-bit ring counter.
    How to answer
    • Show 4 D flip-flops in ring with feedback
    • Explain single circulating 1/0 operation
    • Give state table and timing diagram
    • Mention applications and self-starting
  12. 8 Marks
    bDesign asynchronous 4-bit up/down counter using JK flip-flop.
    How to answer
    • Show 4 JK flip-flops with ripple clocking
    • Explain up/down control logic for count direction
    • Give counting sequence and timing diagram
    • Draw circuit diagram
  13. 7 Marks
    aDraw and explain Tri-state TTL NAND gate.
    How to answer
    • Draw tri-state TTL NAND circuit with enable
    • Explain high, low and high-impedance states
    • Explain totem-pole with tri-state control operation
  14. 7 Marks
    bExplain in detail FPGA with suitable block diagram.
    How to answer
    • Define FPGA and its architecture
    • Explain CLB, interconnects and I/O blocks with block diagram
    • Explain programming technology and applications
  15. 14 Marks
    Write short notes on following any two questions:
    1. i)Implement all logic gates with universal gates.
    2. ii)Design two bit magnitude comparator.
    3. iii)Finite state machine capabilities and limitations.
    4. iv)State diagram and state stable, state reduction.
    How to answer
    • For chosen topics give definition and logic diagram
    • Give truth table / steps and design equations
    • Explain working with example
    • Mention applications
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