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EC-303 RGPV B.Tech

DIGITAL SYSTEM DESIGN (DSD)

Previous year papers and the official syllabus are free to read, no account needed.

Previous Year Papers

7 papers, latest Dec 2025

Free
See all 7 papers

Syllabus, notes and important questions for EC-303

Syllabus units

Topics as the official RGPV syllabus lists them.

Unit 1 Number Systems 9 topics
  • Decimal, Binary, Octal and Hexadecimal systems, conversion from one base to another
  • Codes – BCD, Excess‑3, Gray, Reflected ASCII, EBCDIC
  • Logic gates and binary operations – AND, OR, NOT, NAND, NOR, Exclusive‑OR and Exclusive‑NOR
  • Implementations of logic functions using gates, NAND–NOR implementations, multi‑level gate implementations, multi‑output gate implementations
  • Boolean postulates and laws – De Morgan’s theorem, principle of duality
  • Boolean functions, canonical and standard forms, minimization of Boolean functions, minterm, maxterm
  • Sum of Products (SOP) and Product of Sums (POS)
  • Karnaugh‑map minimization, don’t‑care conditions
  • Quine‑McCluskey method of minimization
Unit 1 notes
Unit 2 Combinational Logic Circuits 12 topics
  • Half adder – Full adder
  • Half subtractor – Full subtractor
  • Parallel‑binary adder and parallel‑binary subtractor
  • Fast adder – Carry‑look‑ahead adder
  • Serial adder/subtractor
  • BCD adder
  • Binary multiplier and binary divider
  • Multiplexer/Demultiplexer
  • Decoder – Encoder
  • Parity checker – Parity generator
  • Code converters
  • Magnitude comparator
Unit 2 notes
Unit 3 Sequential Logic Design 7 topics
  • Building blocks – S‑R, JK and Master‑Slave JK flip‑flops, edge‑triggered flip‑flops
  • Finite‑state machines (FSM)
  • Design of synchronous FSMs
  • Algorithmic State Machine (ASM) charts
  • Design of synchronous circuits – Pulse‑train generator
  • Pseudo‑Random Binary Sequence (PRBS) generator
  • Clock generation
Unit 3 notes
Unit 4 Registers and Counters 8 topics
  • Asynchronous ripple (serial) counter
  • Asynchronous up/down counter
  • Synchronous counters – up/down counters, programmable counters
  • Design of synchronous counters – state diagram, state table, state minimization, state assignment, excitation table and maps, circuit implementation
  • Modulo‑n counters
  • Registers – shift registers, universal shift registers
  • Shift‑register counters – ring counter, shift counters
  • Sequence generators
Unit 4 notes
Unit 5 Logic Families and Semiconductor Memories 6 topics
  • TTL NAND gate – specifications, noise margin, propagation delay, fan‑in, fan‑out, tri‑state operation
  • ECL family characteristics
  • CMOS family characteristics and interfacing
  • Memory elements
  • Programmable logic devices (PLDs) – FPGA concepts
  • Logic implementation using programmable devices
Unit 5 notes
Read the full syllabus

Exam insights

Counted from 7 past EC-303 papers.

Marks asked per paper, by unit

  • Unit 1 Number Systems 28 marks
  • Unit 2 Combinational logic circuits 26 marks
  • Unit 3 Sequential Logic Design 21 marks
  • Unit 4 Registers and Counters 22 marks
  • Unit 5 Logic Families and Semiconductor Memories 13 marks

Average marks of the questions from each unit in one paper. You answer only some of them, so the total is more than the paper’s maximum.

Asked again and again

  1. Convert numbers (including fractional parts) between decimal, binary, octal and hexadecimal systems, and convert to/from Gray code and Excess-3 code.

    Asked 17 times: 2025, 2024, 2023, 2022, 2020, 2019, 2018

  2. Minimize / simplify the Boolean function using K-map to obtain minimal SOP expression (no don't cares)

    Asked 6 times: 2025, 2020, 2019, 2018

  3. Draw the circuit diagram of Tri-state TTL (NAND) gate and explain its working, including truth table and need for tri-state logic

    Asked 5 times: 2025, 2023, 2022, 2020, 2019

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