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EC-701 RGPV B.Tech

VLSI Design (VD)

Previous year papers and the official syllabus are free to read, no account needed.

Previous Year Papers

4 papers, latest Dec 2025

Free
See all 4 papers

Syllabus, notes and important questions for EC-701

Syllabus units

Topics as the official RGPV syllabus lists them.

Unit 1 Practical Consideration and Technology in VLSI Design 12 topics
  • Introduction
  • Size and complexity of Integrated Circuits
  • The Microelectronics Field
  • IC Production Process
  • Processing Steps
  • Packaging and Testing
  • MOS Processes
  • NMOS Process
  • CMOS Process
  • Bipolar Technology
  • Hybrid Technology
  • Design Rules and Process Parameters
Unit 1 notes
Unit 2 Device Modeling 10 topics
  • Dc Models
  • Small Signal Models
  • MOS Models
  • MOSFET Models in High Frequency and small signal
  • Short channel devices
  • Sub threshold Operations
  • Modeling Noise Sources in MOSFET’s
  • Diode Models
  • Bipolar Models
  • Passive component Models
Unit 2 notes
Unit 3 Circuit Simulation 11 topics
  • Introduction
  • Circuit Simulation Using Spice
  • MOSFET Model
  • Level 1 Large signal model
  • Level 2 Large Signal Model
  • High Frequency Model
  • Noise Model of MOSFET
  • Large signal Diode Current
  • High Frequency BJT Model
  • BJT Noise Model
  • temperature Dependence of BJT
Unit 3 notes
Unit 4 Structured Digital Circuits and Systems 9 topics
  • Random Logic and Structured Logic Forms
  • Register Storage Circuits
  • Quasi Static Register Cells
  • A Static Register Cell
  • Micro coded Controllers
  • Microprocessor Design
  • Systolic Arrays
  • Bit-Serial Processing Elements
  • Algotronix
Unit 4 notes
Unit 5 CMOS Processing Technology 11 topics
  • Basic CMOS Technology
  • A Basic n-well CMOS Process
  • Twin Tub Processes
  • CMOS Process Enhancement
  • Interconnects and Circuit Elements
  • Layout Design Rules
  • Latch up
  • Physical Origin
  • Latchup Triggering
  • Latch up Prevention
  • Internal Latch up Prevention Techniques
Unit 5 notes
Read the full syllabus

Exam insights

Counted from 4 past EC-701 papers.

Marks asked per paper, by unit

  • Unit 1 Practical Consideration and Technology in VLSI Design 24 marks
  • Unit 2 Device Modeling 21 marks
  • Unit 3 Circuit Simulation 16 marks
  • Unit 4 Structured Digital Circuits and Systems 28 marks
  • Unit 5 CMOS Processing Technology 18 marks

Average marks of the questions from each unit in one paper. You answer only some of them, so the total is more than the paper’s maximum.

Asked again and again

  1. Explain the principle and procedure of microprocessor design methods using structured logic, including a practical application and advantages in efficiency and scalability.

    Asked 3 times: 2024, 2023, 2020

  2. Explain passive component models and discuss the modeling of resistors, capacitors and inductors in integrated circuits.

    Asked 2 times: 2025

  3. Explain the operation and architecture of microcoded controllers in structured digital circuits.

    Asked 2 times: 2025, 2024

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