IT-305 Digital Circuits and Systems - Jun 2023 Question Paper

Under each question, How to answer lists the points an answer should cover, outlined by CampusPrep from the syllabus. Check the details against your textbook.

1. 7 Marks
   aFind the decimal values of i) $(657)_8$ ii) $(1\text{AF})_{16}$
   How to answer

   • Convert $(657)_8 = 6 \times 8^2 + 5 \times 8^1 + 7 \times 8^0 = 384 + 40 + 7 = 431_{10}$
   • Convert $(1\text{AF})_{16} = 1 \times 16^2 + 10 \times 16^1 + 15 \times 16^0 = 256 + 160 + 15 = 431_{10}$
   • State final decimal values clearly.
2. 7 Marks
   bWhat do you mean by universal Gates? How to realize AND, OR and NOT functions using universal gates only?
   How to answer

   • Define universal gates (NAND and NOR) and explain why they are called universal.
   • Realization of NOT, AND, and OR gates using NAND gates alone with circuit diagrams and boolean expressions.
   • Realization of NOT, AND, and OR gates using NOR gates alone with circuit diagrams and boolean expressions.
3. 7 Marks
   aFind the minimal sum of products for the Boolean expression $F = \Sigma(1, 2, 3, 7, 8, 9, 10, 11, 14, 15)$ using the K map method.
   How to answer

   • Draw a 4-variable Karnaugh Map (variables A, B, C, D) and plot the given minterms: 1, 2, 3, 7, 8, 9, 10, 11, 14, 15.
   • Group adjacent 1s into maximal quads/octets.
   • Identify prime implicants and eliminate redundant groups.
   • Write the simplified minimal SOP Boolean expression.
4. 7 Marks
   bSimplify the Boolean function with K-map $F(A, B, C) = \Sigma(0, 1, 4, 5)$
   How to answer

   • Draw a 3-variable Karnaugh Map for variables A, B, C.
   • Fill minterms 0, 1, 4, 5 with 1s.
   • Combine minterms (0, 1, 4, 5) into a single group of 4 (quad).
   • Obtain the minimal expression $F = B'$.
5. 7 Marks
   aWhat do you mean by code converter circuits? Design a Binary to Gray code converter circuit.
   How to answer

   • Define code converter circuits and explain their purpose.
   • Construct the truth table for a 4-bit Binary to Gray code converter ($B_3 B_2 B_1 B_0$ to $G_3 G_2 G_1 G_0$).
   • Derive simplified Boolean expressions: $G_3 = B_3$, $G_2 = B_3 \oplus B_2$, $G_1 = B_2 \oplus B_1$, $G_0 = B_1 \oplus B_0$.
   • Draw the logic circuit diagram using XOR gates.
6. 7 Marks
   bWrite all the necessary steps and design a Full Subtractor circuit.
   How to answer

   • Define Full Subtractor and state design steps.
   • Formulate truth table with inputs A, B, $B_{in}$ and outputs Difference (D) and Borrow ($B_{out}$).
   • Obtain Boolean expressions using K-maps: $D = A \oplus B \oplus B_{in}$, $B_{out} = A'B + A'B_{in} + BB_{in}$ (or $A'(B \oplus B_{in}) + B B_{in}$).
   • Draw the logic circuit diagram using basic gates or XOR, AND, OR gates.
7. 7 Marks
   aDraw JK flip flop write truth table, excitation table and characteristic equations.
   How to answer

   • Draw the logic circuit / block diagram of a clocked JK flip-flop using NAND/NOR gates.
   • Provide the truth table (characteristic table) with inputs J, K, $Q_n$ and next state $Q_{n+1}$.
   • Derive the characteristic equation using K-map: $Q_{n+1} = J\bar{Q}_n + \bar{K}Q_n$.
   • Provide the excitation table showing transitions $Q_n \to Q_{n+1}$ and required values of J and K.
8. 7 Marks
   bDraw circuit diagram of Ring Counter and explain it in detail.
   How to answer

   • Define a Ring Counter (a circular shift register with the output of the last flip-flop connected to the input of the first).
   • Draw the 4-bit Ring Counter circuit diagram using D or JK flip-flops with common clock and reset/preset.
   • Show state table / sequence of states (1000 -> 0100 -> 0010 -> 0001 -> 1000).
   • Explain operation and point out modulus ($Mod = N$ for $N$ flip-flops).
9. 7 Marks
   aWhat is a Decoder? Implement a Full adder circuit with a decoder.
   How to answer

   • Define a decoder combinational circuit.
   • Specify Full Adder equations: $Sum = \Sigma m(1, 2, 4, 7)$ and $C_{out} = \Sigma m(3, 5, 6, 7)$.
   • Use a 3-to-8 line decoder with inputs A, B, $C_{in}$.
   • Draw circuit diagram connecting decoder minterm outputs to two OR gates for Sum and Carry.
10. 7 Marks
    bDesign and draw a Mod-6 counter using D flip-flops.
    How to answer

    • Determine number of flip-flops required ($2^n \ge 6 \implies n = 3$ flip-flops: $Q_2, Q_1, Q_0$).
    • Construct state table for states 000 through 101, and define unused states 110, 111 as don't cares.
    • Derive excitation equations for $D_2, D_1, D_0$ using K-maps.
    • Draw the complete circuit schematic with 3 D flip-flops, combinational logic gates, and clock.
11. 7 Marks
    aHow logic is generated by TTL logic family? Compare it with CMOS logic family.
    How to answer

    • Explain logic generation in TTL using multi-emitter BJT input transistor and totem-pole output stage for High and Low logic levels.
    • Provide a comparison table between TTL and CMOS across parameters: technology (BJT vs MOSFET), power dissipation, propagation delay, noise immunity, fan-out, and supply voltage.
12. 7 Marks
    bCompare TTL, ECL and CMOS on the basis of Fan-in, Fan-out, propagation delay and power dissipation parameters.
    How to answer

    • Define Fan-in, Fan-out, propagation delay, and power dissipation.
    • Create a comparative table with columns: Parameter, TTL, ECL, CMOS.
    • Populate values/ranges: Fan-out (TTL ~10, ECL ~25, CMOS >50), Propagation delay (ECL ~1-2 ns, TTL ~10 ns, CMOS ~10-30 ns), Power dissipation (ECL highest ~25-50 mW, TTL ~10 mW, CMOS lowest ~nW static), Fan-in.
13. 7 Marks
    aWhat do you mean by multivibrator? Draw circuit diagram of ASTABLE multivibrator and explain its operation.
    How to answer

    • Define multivibrator and classify into monostable, bistable, and astable types.
    • Define astable multivibrator as a free-running relaxation oscillator with no stable state.
    • Draw circuit diagram (using IC 555 timer or two BJTs cross-coupled).
    • Explain charging and discharging of capacitors and give expression for frequency / time periods.
14. 7 Marks
    bDraw Flash type analog to digital converter and explain its working in details.
    How to answer

    • Draw the circuit diagram of a 3-bit Flash ADC showing resistor divider network, comparators ($2^n - 1 = 7$), and priority encoder.
    • Explain how the analog input voltage is compared simultaneously with reference voltages.
    • Explain the conversion of thermometer code into binary code via the priority encoder.
    • Highlight advantages (fastest conversion speed) and disadvantages (high hardware complexity).
15. 14 Marks
    Write short notes on any two of the following: a) Multiplexers b) Shift Registers c) LED and LCD display devices d) CMOS Logic family
    How to answer

    • Multiplexers: Data selector definition, block diagram, select lines relationship $2^n$ to $1$, applications.
    • Shift Registers: Definition, serial-in serial-out, serial-in parallel-out, parallel-in serial-out, parallel-in parallel-out, diagrams.
    • LED and LCD: Principle of electroluminescence vs liquid crystal light modulation, comparison, applications in seven-segment displays.
    • CMOS Logic family: Complementary MOS structure (PMOS and NMOS), working of CMOS inverter, characteristics (extremely low static power, high noise margin).