UNIT 2: INDUSTRIAL ELECTRONICS - SHORT NOTES

I. POWER ELECTRONICS FUNDAMENTALS

A. Rectifiers

Single-phase half-wave rectifier:

• With R load (uncontrolled, diode):

  • Operation: Diode conducts for positive half-cycle (0 to π), blocks negative half.

  • Waveform: Output = $$\displaystyle V_m \sin \omega t $$ for $0 \le \omega t \le \pi$, 0 for $\pi \le \omega t \le 2\pi$.

  • Average output voltage: $$\displaystyle V_{dc} = \frac{1}{2\pi} \int_0^\pi V_m \sin \theta \, d\theta = \boxed{\frac{V_m}{\pi}} $$.

  • RMS output: $$\displaystyle V_{rms} = \frac{V_m}{2} $$.

  • Ripple factor: $\gamma \approx 1.21$ (121%).

• With RL load (controlled, SCR):

  • Operation: SCR triggered at firing angle $\alpha$, conducts from $\alpha$ to extinction angle $\beta$ ($$\displaystyle \beta > \pi $$ for inductive load).

  • Output: $$\displaystyle v_o = V_m \sin \omega t $$ for $\alpha \le \omega t \le \beta$, 0 otherwise.

  • Average output voltage: $$\displaystyle V_{dc} = \frac{1}{2\pi} \int_\alpha^\beta V_m \sin \theta \, d\theta = \boxed{\frac{V_m}{2\pi} (\cos \alpha - \cos \beta)} $$.

  • $\beta$ determined from $$\displaystyle \tan \beta = \frac{\omega L}{R} \tan \alpha $$ (for continuous conduction, $$\displaystyle \beta = \pi $$ gives $$\displaystyle V_{dc} = \frac{V_m}{2\pi}(1 + \cos \alpha) $$).

[!TIP] For RL load, if $$\displaystyle \alpha < \tan^{-1}(R/\omega L) $$, conduction extends beyond $\pi$ ($$\displaystyle \beta > \pi $$). For $$\displaystyle \alpha = 0 $$, $$\displaystyle \beta > \pi $$ and $$\displaystyle \cos \beta < -1 $$? Actually $\beta$ solves $$\displaystyle \cos \beta = \cos \alpha - \frac{\omega L}{R} \sin \beta $$? Standard formula: $$\displaystyle \cos \beta = \cos \alpha - \frac{\omega L}{R} \sin \beta $$. But often approximated.

Single-phase full-wave rectifier:

• Topologies: Center-tapped transformer with two diodes, or bridge rectifier (four diodes).

• With R load:

  • Output: $$\displaystyle v_o = |V_m \sin \omega t| $$.

  • Average: $$\displaystyle V_{dc} = \frac{2V_m}{\pi} $$ (for center-tap, each secondary voltage $$\displaystyle V_m $$; for bridge, $$\displaystyle V_m $$ is peak of secondary).

  • RMS: $$\displaystyle V_{rms} = \frac{V_m}{\sqrt{2}} $$.

  • Ripple factor: $\gamma \approx 0.48$ (48%).

• With RL load: Similar to half-wave but with two conduction periods per cycle. For continuous conduction, $$\displaystyle V_{dc} = \frac{2V_m}{\pi} \cos \alpha $$ (controlled with SCRs).

• Advantages over half-wave:

  • Higher efficiency (utilizes both half-cycles).

  • Lower ripple factor (easier filtering).

  • Higher average output for same $$\displaystyle V_m $$.

• Disadvantages:

  • Requires more diodes/SCRs (cost, complexity).

  • Higher peak inverse voltage (PIV) rating for diodes.

  • Center-tap transformer introduces losses and size.

[!TIP] Full-wave rectifiers are preferred in power supplies for better performance, but bridge configuration avoids center-tap transformer.

B. Silicon Controlled Rectifier (SCR)

VI Characteristics:

• Forward blocking: Anode positive wrt cathode, gate open. Small leakage current until breakover voltage $$\displaystyle V_{BO} $$.

• Forward conducting: After triggering (gate or breakover), low voltage drop (1-2 V), high current.

• Reverse blocking: Reverse biased like diode, small leakage until reverse breakdown.

• Holding current ($$\displaystyle I_H $$): Minimum anode current to maintain conduction after gate signal removed.

• Latching current ($$\displaystyle I_L $$): Minimum anode current required to latch SCR immediately after gate trigger. $$\displaystyle I_L > I_H $$.

• DiagramSEARCH: SCR VI characteristics marking holding current and latching current

Transistor Model:

• Two coupled transistors (PNP and NPN).

• Derivation: Let $$\displaystyle \alpha_1 $$, $$\displaystyle \alpha_2 $$ be current gains, $$\displaystyle I_{CBO1} $$, $$\displaystyle I_{CBO2} $$ leakage currents.

  • Anode current: $$\displaystyle I_A = \frac{\alpha_2 I_{CBO1} + I_{CBO2}}{1 - \alpha_1 \alpha_2} $$ (IG=0).

  • With gate current $$\displaystyle I_G $$: $$\displaystyle I_A = \frac{\alpha_2 (I_{CBO1} + I_G) + I_{CBO2}}{1 - \alpha_1 \alpha_2} $$.

  • When $$\displaystyle \alpha_1 \alpha_2 \to 1 $$, $$\displaystyle I_A $$ becomes very large (regenerative action).

Static Characteristics:

• $$\displaystyle V_{AK} $$ vs $$\displaystyle I_A $$ for different $$\displaystyle I_G $$.

• Forward breakover voltage decreases with increasing $$\displaystyle I_G $$.

• On-state voltage drop ~1-2 V at high current.

Turn-on (Firing) Methods:

1. Gate triggering: Most common. Positive gate current pulse.

2. Thermal triggering: High temperature increases leakage, may cause false turn-on.

3. Light triggering (LASCR): Light incident on gate junction.

4. dv/dt triggering: High $$\displaystyle \frac{dv}{dt} $$ causes capacitive coupling, false turn-on (undesirable).

Turn-off (Commutation) Methods:

1. Natural commutation (line commutation): In AC circuits, current goes through zero.

2. Forced commutation:

   • Self-commutation: Resonant circuit (LC) forces current to zero.

   • Auxiliary commutation: Separate commutating SCR or circuit.

   • Classes: A (load commutation), B (external pulse), C (complementary), D (resonant), E (impulse).

Causes of Damage:

• Overvoltage: Transients (inductive kick, switching).

• Overcurrent: Excessive $$\displaystyle I_A $$ causes thermal runaway.

• Thermal runaway: High current → high power loss → temperature ↑ → leakage ↑ → more current.

• dv/dt: Unintended turn-on due to fast voltage rise.

• di/dt: Excessive turn-on rate causes localized heating.

Protection Circuits:

• Overvoltage: Snubber circuit (RC across SCR), varistor (VDR), avalanche diode.

• Overcurrent: Fuse (fast-blow), circuit breaker, electronic crowbar (detect overcurrent, trigger SCR to short output or shut down).

  • Electronic crowbar: Comparator senses current, triggers SCR across supply or gate of power device.
• DiagramSEARCH: SCR overvoltage protection snubber circuit

Applications:

• AC/DC converters (phase-controlled rectifiers).

• DC motor speed control.

• Static switches and relays.

• Power control in heaters, lighting.

• Inverters and cycloconverters.

C. Power MOSFET

Principle of Operation:

• N-channel enhancement MOSFET (vertical structure).

• Gate voltage $$\displaystyle V_{GS} > V_{th} $$ creates channel, allows drain current $$\displaystyle I_D $$.

• Voltage-controlled device, high input impedance.

• Switching: fast turn-on/off due to majority carrier conduction.

Characteristics:

• Output: $$\displaystyle I_D $$ vs $$\displaystyle V_{DS} $$ for various $$\displaystyle V_{GS} $$ (quadrant I only).

• Transfer: $$\displaystyle I_D $$ vs $$\displaystyle V_{GS} $$ (square law: $$\displaystyle I_D = K (V_{GS}-V_{th})^2 $$ in saturation).

• DiagramSEARCH: Power MOSFET output and transfer characteristics

Applications:

• High-frequency switch-mode power supplies (SMPS).

• DC-DC converters.

• Motor drives (low to medium power).

• Class-D audio amplifiers.

Power Loss Considerations:

• Conduction loss: $$\displaystyle P_{cond} = I_{D,rms}^2 \cdot R_{DS(on)} $$ (increases with temperature).

• Switching loss: $$\displaystyle P_{sw} = \frac{1}{2} V_{DS} I_D (t_{on} + t_{off}) f_s $$ (dominant at high $$\displaystyle f_s $$).

• Total loss: $$\displaystyle P_{total} = P_{cond} + P_{sw} $$.

D. Insulated Gate Bipolar Transistor (IGBT)

Principle of Operation and Features:

• Combines MOSFET input (voltage-controlled, high input impedance) with BJT output (low saturation voltage).

• Structure: P+ collector, N- drift region, P body, N+ emitter, gate on P body.

• Operation: $$\displaystyle V_{GE} > V_{th} $$ creates MOSFET channel, electrons injected from emitter into drift region, conductivity modulation by holes from collector.

• Features: High voltage (600V-6.5kV), high current, fast switching (though slower than MOSFET), low on-state voltage drop.

Transistor Model:

• Equivalent to MOSFET driving a BJT (pnp in N-channel IGBT).

• Anode current $$\displaystyle I_C $$ controlled by gate-emitter voltage $$\displaystyle V_{GE} $$.

V-I Characteristics:

• Transfer: $$\displaystyle I_C $$ vs $$\displaystyle V_{GE} $$ (threshold around 2-6 V).

• Output: $$\displaystyle V_{CE} $$ vs $$\displaystyle I_C $$ for various $$\displaystyle V_{GE} $$ (saturation region, $$\displaystyle V_{CE(sat)} \approx 1-3 $$ V).

• DiagramSEARCH: IGBT V-I characteristics transfer and output

Applications:

• Medium to high-power inverters (motor drives, UPS).

• AC/DC converters.

• Traction systems.

• Welding inverters.

Comparison with MOSFET and SCR:

E. Switch Mode Power Supplies (SMPS)

Overview and Advantages:

• Switching regulator operates at high frequency (20 kHz-1 MHz), uses inductor/capacitor energy storage.

• Advantages over linear regulators: High efficiency (70-90%), smaller size/weight (high-frequency transformer), wide input range.

• Disadvantages: EMI, complexity, cost.

Basic Topologies:

1. Buck (step-down): $$\displaystyle V_{out} = D \cdot V_{in} $$, $D$ = duty cycle.

   • Circuit: Switch (MOSFET), diode, inductor, capacitor.

   • DiagramCANVAS: Buck converter: input -> switch -> inductor -> load, diode across inductor, capacitor parallel load

2. Boost (step-up): $$\displaystyle V_{out} = \frac{V_{in}}{1-D} $$.

   • Circuit: Switch in series with input, inductor, diode to output, capacitor.

3. Buck-boost (inverting): $$\displaystyle V_{out} = -\frac{D}{1-D} V_{in} $$.

4. Full-bridge regulator: Derived from buck by replacing switch with full-bridge of four switches and adding transformer for isolation. Used for high power.

Switched Mode Voltage Regulator Operation:

• Switch ON/OFF at constant frequency $$\displaystyle f_s $$, duty cycle $D$ adjusted via feedback to maintain constant $$\displaystyle V_{out} $$.

• Energy stored in inductor during ON, transferred to load during OFF.

• Feedback loop: sense $$\displaystyle V_{out} $$, compare with reference, error amplifier controls switch duty cycle (PWM).

Design Calculations (Buck Example):

Given: $$\displaystyle V_{in} $$, $$\displaystyle V_{out} $$, $$\displaystyle I_{out} $$, $$\displaystyle f_s $$, $$\displaystyle \Delta I_L $$ (ripple current).

• Duty cycle: $$\displaystyle D = \frac{V_{out}}{V_{in}} $$.

• Inductor: $$\displaystyle L = \frac{(V_{in} - V_{out}) \cdot D}{\Delta I_L \cdot f_s} $$.

• Capacitor (for CCM): $$\displaystyle C \ge \frac{\Delta I_L}{8 \cdot f_s \cdot \Delta V_{out}} $$ (approximate, where $$\displaystyle \Delta V_{out} $$ is output ripple).

• Example (Dec 2024): $$\displaystyle V_{in}=110 $$ V, $$\displaystyle V_{out}=60 $$ V, $$\displaystyle I_{out}=30 $$ A, $$\displaystyle f_s=25 $$ kHz, $$\displaystyle \Delta I_L=1.2 $$ A.

  • $$\displaystyle D = 60/110 = 0.5455 $$.

  • $$\displaystyle L = \frac{(110-60) \times 0.5455}{1.2 \times 25000} = \frac{50 \times 0.5455}{30000} = \frac{27.275}{30000} \approx 0.000909 $$ H = 909 µH.

  • Load current is given as 30 A average; ripple current is 1.2 A peak-to-peak.

Protection Circuits:

• Electronic crowbar: Overcurrent detection (sense resistor, comparator) triggers SCR to short output or turn off main switch, blowing fuse or shutting down.

• Overvoltage, overtemperature protection.

Applications:

• Computer power supplies (ATX).

• Telecom equipment.

• Industrial control systems.

• LED drivers.

II. OPERATIONAL AMPLIFIER (OP-AMP) CIRCUITS

A. Basic OP-AMP Characteristics & Configurations

Ideal Op-Amp Assumptions:

• Infinite open-loop gain $$\displaystyle A_{OL} $$.

• Infinite input impedance.

• Zero output impedance.

• Infinite bandwidth.

• Zero offset voltage.

Key Parameters:

• Common Mode Rejection Ratio (CMRR): Ratio of differential gain to common-mode gain. $$\displaystyle \text{CMRR} = \frac{A_d}{A_{cm}} $$ (in dB). High CMRR rejects noise.

• Slew Rate (SR): Maximum rate of output voltage change (V/µs). $$\displaystyle SR = \frac{dV_o}{dt}_{max} $$. Limits frequency response.

• Gain: Open-loop ($$\displaystyle A_{OL} $$, very high ~10^5), Closed-loop ($$\displaystyle A_{CL} $$, set by feedback network).

Configurations:

• Inverting amplifier:

  • Gain: $$\displaystyle A_v = -\frac{R_f}{R_{in}} $$.

  • Virtual ground at inverting input.

• Non-inverting amplifier:

  • Gain: $$\displaystyle A_v = 1 + \frac{R_f}{R_{in}} $$.

  • High input impedance.

• DiagramSEARCH: op-amp inverting and non-inverting amplifier circuits

B. OP-AMP as Comparator

Basic Comparator:

• Op-amp without feedback, operates in open-loop.

• Output saturates to positive or negative rail based on input polarity.

• Zero crossing: Reference at 0 V. Output high when $$\displaystyle V_+ > V_- $$, low otherwise.

• Non-zero crossing: Reference $$\displaystyle V_{ref} $$ applied to one input.

• DiagramSEARCH: op-amp comparator circuit

Window Comparator:

• Two comparators: one with upper threshold $$\displaystyle V_{UTP} $$, one with lower $$\displaystyle V_{LTP} $$.

• Output high when $$\displaystyle V_{in} $$ between thresholds, low otherwise.

• Applications: overvoltage/undervoltage detection, level sensing.

C. OP-AMP Oscillators

Wien Bridge Oscillator:

• Circuit: Op-amp with positive feedback via Wien network (series RC and parallel RC).

• Frequency: $$\displaystyle f = \frac{1}{2\pi RC} $$.

• Condition for oscillation: $$\displaystyle A_{OL} \ge 3 $$ (gain set by $$\displaystyle R_f $$, $$\displaystyle R_1 $$: $$\displaystyle 1 + \frac{R_f}{R_1} \ge 3 $$).

• Amplitude stabilization: nonlinear elements (diodes, lamp, FET).

• DiagramSEARCH: Wien bridge oscillator op-amp circuit

Relaxation Oscillator:

• Uses comparator with positive feedback (hysteresis).

• Capacitor charges/discharges through resistor, thresholds set by feedback.

• Output: square wave; capacitor voltage: triangle wave.

• Frequency: $$\displaystyle f = \frac{1}{2RC \ln\left(\frac{1+\beta}{1-\beta}\right)} $$, where $$\displaystyle \beta = \frac{R_1}{R_1+R_2} $$ (feedback ratio).

D. OP-AMP Active Filters

Low-Pass Filter:

• First-order: Single RC in feedback. Cutoff $$\displaystyle f_c = \frac{1}{2\pi RC} $$. Gain $$\displaystyle A_v = 1 + \frac{R_f}{R_{in}} $$ (inverting) or non-inverting.

• Second-order (Sallen-Key): Two capacitors, two resistors. Unity gain or buffered.

  • $$\displaystyle f_c = \frac{1}{2\pi \sqrt{R_1 R_2 C_1 C_2}} $$ (for unity gain).

  • Quality factor $Q$ adjustable.

• DiagramSEARCH: Sallen-Key low-pass filter op-amp

Other Filters:

• High-pass: Capacitor in series, resistor in feedback.

• Band-pass: Cascade of HPF and LPF.

• Band-stop: Parallel combination of HPF and LPF.

E. OP-AMP as Function Generator

Circuit Configuration:

• Integrator (from comparator output) generates triangle wave.

• Triangle wave to non-linear network (e.g., diodes, transistors) to approximate sine wave.

• Alternatively, Wien bridge oscillator for sine, comparator for square, integrator for triangle.

• Principle: Square wave from comparator → integrate to triangle → shape to sine via piecewise linear or feedback.

III. PROGRAMMABLE LOGIC CONTROLLERS (PLCs)

A. Fundamentals & Architecture

Functional Block Diagram:

• Power supply: Converts AC/DC to required DC for modules.

• CPU: Microprocessor/microcontroller, executes program, manages I/O.

• Memory: ROM (firmware), RAM (user program, data).

• I/O modules: Digital (discrete: ON/OFF), Analog (continuous: 0-10V, 4-20mA). Isolated.

• Programming device: PC, handheld programmer.

• DiagramSEARCH: PLC functional block diagram

Components Functions:

• Power supply: Isolated, regulated.

• CPU: Scans I/O, executes logic, communicates.

• I/O: Inputs read sensors (pushbuttons, proximity switches); Outputs drive actuators (relays, contactors, drives).

• Programming device: Write/test/debug ladder logic.

B. Programming Languages & Logic

Ladder Logic Language:

• Symbols:

  • Contacts: Normally Open (NO), Normally Closed (NC).

  • Coils: Output latch, unlatch.

  • Timers: ON-delay (TON), OFF-delay (TOF).

  • Counters: Up (CTU), Down (CTD).

• Representation: Rungs read left to right, top to bottom. Parallel = OR, Series = AND.

• Examples:

  • Motor start-stop:

    
    |---[ I1 ]---[ I2 ]---( O1 )---|
    

|---[ O1 ]-------------------|

```

(I1=start pushbutton NO, I2=stop pushbutton NC, O1=motor contactor).

• Sequence control: Timers/counters for timed operations.

Other IEC 61131-3 Languages (brief):

• Instruction List (IL): Low-level, assembly-like.

• Function Block Diagram (FBD): Graphical blocks with inputs/outputs.

• Structured Text (ST): High-level text (Pascal-like).

• Sequential Function Chart (SFC): Steps and transitions.

Basic Programming Examples:

• Traffic light control (timers).

• Conveyor belt sequence (counters).

• Tank level control (analog comparison).

C. PLC Operating Modes

• Program mode: Edit/upload/download program, I/O disabled.

• Run mode: Execute program, I/O active.

• Test/Monitor mode: Run program but I/O may be disabled or simulated; debug.

D. Communication & Networking

Standard Protocols:

• Modbus: Master-slave, simple, serial (RS-232/485) or Ethernet. Common for SCADA.

• Profibus: Fieldbus, DP (decentralized peripherals), PA (process automation). High speed.

• DeviceNet: CAN-based, for device-level networking (sensors, actuators).

• Ethernet/IP: Industrial Ethernet, CIP protocol, high bandwidth.

E. Applications & Comparison

Functions and Applications:

• Sequence control (manufacturing lines).

• Motion control (servo/stepper drives).

• Process control (temperature, pressure, flow).

• Data acquisition and monitoring.

• Building automation.

Comparison with Relay Controllers:

Interface with Power Electronics:

• PLC digital outputs (relay, transistor, triac) drive gate drives for SCR, MOSFET, IGBT.

• Analog outputs control reference voltages for regulators.

• PLC reads feedback (current, voltage, position) via analog inputs.

• Role: Central controller in automated systems (e.g., motor drive, UPS, SMPS).

F. Special PLC Concepts

Event-Driven Devices:

• Interrupt-driven: PLC responds immediately to high-priority events (e.g., emergency stop, fault).

• Configured as hardware interrupts or high-speed counters.

Role in Distributed Control Systems (DCS):

• PLCs act as local control nodes in DCS architecture.

• Communicate over high-speed networks (Ethernet/IP, Profinet) to central SCADA.

• Handle real-time control, while DCS focuses on process optimization.

IV. SPECIALIZED TOPICS & INTEGRATED SYSTEMS

A. Uninterruptible Power Supplies (UPS)

On-line UPS:

• Block diagram: Utility → Rectifier → Battery → Inverter → Load. Static switch for bypass.

• Operation:

  • Rectifier: Converts AC to DC, charges battery, supplies inverter.

  • Inverter: Always active, converts DC to clean AC sinusoid.

  • Static switch: Fast transfer to bypass if inverter fails.

  • Battery: Provides backup during utility failure.

• Advantages: No transfer time, voltage/frequency regulation, isolation.

• DiagramSEARCH: on-line UPS block diagram

Active Power Line Conditioning:

• Mitigates voltage sags/swells, harmonics.

• Concept: Series-connected voltage source inverter injects compensating voltage.

• Diagram: Supply → series transformer → load; inverter connected to transformer secondary via DC bus (capacitor).

• Detects sag, injects boost voltage; detects swell, injects buck voltage.

B. Commutation Techniques (Detailed)

Types with Sketches:

• Class A (Self-commutation): Load provides reverse voltage (e.g., RL load with capacitor). Used in single-phase inverters.

• Class B (External pulse): Separate pulse transformer or auxiliary SCR provides reverse voltage.

• Class C (Complementary): Two SCRs, one conducts while the other is commutated.

• Class D (Resonant): LC circuit creates oscillatory current to force turn-off.

• Class E (Impulse): Capacitor charged in parallel, then discharged through transformer to provide impulse.

• Application: AC/DC converters (phase-controlled), inverters (forced commutation for DC input).

[!TIP] Class D commutation is common in DC-DC converters and inverters due to efficiency.

C. Power Device Protection & Loss

Loss in Semiconductor Devices:

• Switching losses: During turn-on ($$\displaystyle V_{DS} $$ high, $$\displaystyle I_D $$ rising) and turn-off ($$\displaystyle I_D $$ high, $$\displaystyle V_{DS} $$ rising). $$\displaystyle P_{sw} = \frac{1}{2} V I (t_{on}+t_{off}) f_s $$.

• Conduction losses: On-state voltage drop or resistance. $$\displaystyle P_{cond} = I^2 R $$ (MOSFET) or $$\displaystyle V_{CE(sat)} I $$ (IGBT/BJT).

• Factors: Switching frequency, device parameters (capacitances, $$\displaystyle R_{DS(on)} $$, $$\displaystyle V_{CE(sat)} $$), drive conditions.

Comprehensive Protection Strategies:

• Overvoltage: Snubber (RC, RCD), varistor, avalanche diode.

• Overcurrent: Fast fuse, Hall-effect sensor, current transformer, electronic crowbar.

• Thermal: Heat sink, thermal shutdown, temperature sensor.

• dv/dt: Snubber, gate resistor.

• di/dt: Inductor in series with source, controlled gate drive.

• Electrostatic discharge (ESD): Protection diodes, careful handling.

[!TIP] For high-frequency SMPS, switching losses dominate; use devices with low gate charge (MOSFET) or soft-switching techniques.