CMOS DESIGN (EC-603 (B)) - Important Questions
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Unit 57 Marks High Priority
Define threshold voltage, derive its expression and discuss its dependence on various parameters.
Predicted for DEC-2026
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Unit 17 Marks High Priority
Realize NMOS complex logic gates using the Boolean function Z = A(D + C) + BE.
Predicted for DEC-2026
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Unit 37 Marks High Priority
The output Z of a fundamental mode, two input sequential circuit is to change from 0 to 1 only when x2 changes from 0 to 1 while x1=1. The output changes from 1 to 0 only when x1 changes from 1 to 0 while x2=1. Derive the flow table, excitation map and realize the circuit.
Predicted for DEC-2026
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Unit 27 Marks High Priority
Draw the state diagrams of a sequence detector which can detect 101.
Predicted for DEC-2026
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Unit 314 Marks High Priority
Analyze the behavior of an asynchronous sequential toggle circuit with flow table.
Predicted for DEC-2026
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Unit 47 Marks High Priority
Explain with neat diagrams the various NMOS fabrication technology.
Predicted for DEC-2026
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Unit 47 Marks High Priority
Draw and explain BiCMOS inverter circuit.
Predicted for DEC-2026
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Unit 57 Marks High Priority
How to construct a resistor using MOS transistor?
Predicted for DEC-2026
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Unit 57 Marks High Priority
With the help of required expressions explain Sub-threshold MOS Model.
Predicted for DEC-2026
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Unit 17 Marks High Priority
Discuss transient analysis of CMOS transmission gate using resistor equivalent circuit.
Predicted for DEC-2026
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Unit 17 Marks High Priority
Design an Ex-OR gate using transmission gate logic.
Predicted for DEC-2026
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Unit 27 Marks High Priority
Explain Mealy and Moore model machines with state table and transition diagram. Compare the two models.
Predicted for DEC-2026
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Unit 37 Marks High Priority
Compare fundamental mode and pulse mode asynchronous sequential machines with suitable examples and flow tables.
Predicted for DEC-2026
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Unit 214 Marks High Priority
Write short notes on the following: (i) Realization of state diagram and state table from verbal description (ii) State reduction and state assignment in sequential systems.
Predicted for DEC-2026
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