EC-504-B Computer System Organization - Dec 2024 Question Paper

Under each question, How to answer lists the points an answer should cover, outlined by CampusPrep from the syllabus. Check the details against your textbook.

1. 7 Marks
   aDescribe the Von Neumann model of a computer system and explain its key components.
   How to answer

   • Define Von Neumann stored-program concept
   • List components: memory, CPU (ALU, CU, registers), input/output, buses
   • Explain function and interaction of each component
   • Diagram of Von Neumann architecture
2. 7 Marks
   bA computer system has 8 registers and the program counter points to an instruction with the address 1005. Explain the steps involved in the instruction fetch and decode phase of this instruction.
   How to answer

   • State PC=1005, 8 registers, fetch cycle steps
   • Explain MAR <- PC, memory read, MDR -> IR, PC increment
   • Explain decode: opcode decoding, address extraction, control signals
   • Role of registers in fetch-decode
3. 7 Marks
   aDifferentiate between a hardwired control unit and a microprogrammed control unit with suitable diagrams.
   How to answer

   • Define hardwired vs microprogrammed control
   • Compare design, speed, flexibility, cost, modification
   • Block diagram of each control unit
   • Applications and examples
4. 7 Marks
   bDescribe the microinstruction format and explain its role in control memory.
   How to answer

   • Define microinstruction and control memory
   • Describe fields: control signals, next-address, condition/select
   • Explain horizontal vs vertical format
   • Explain role in generating control signals sequencing
5. 7 Marks
   aExplain the different modes of data transfer including program controlled, interrupt-driven and DMA.
   How to answer

   • Define program controlled, interrupt-driven, DMA transfer
   • Explain working, CPU involvement, flowchart
   • Compare speed, efficiency, hardware needs
   • Examples of use
6. 7 Marks
   bDescribe the working of I/O processor and its role in asynchronous data transfer.
   How to answer

   • Define I/O processor (IOP/channel)
   • Explain working: fetching I/O instructions, DMA, communication with CPU
   • Explain asynchronous transfer with strobe/handshaking
   • Role in offloading CPU
7. 7 Marks
   aWhat is Associative Memory? How is it different from cache memory?
   How to answer

   • Define associative memory (content addressable)
   • Explain parallel search by content/mask
   • Differentiate organization, access method, cost, use vs cache
   • Applications
8. 7 Marks
   bA system uses a cache memory of size 8 kB with a block size of 64 bytes. Calculate the number of blocks in the cache and explain the direct mapping process.
   How to answer

   • Formula: number of blocks = cache size / block size = 8kB/64B = 128
   • Explain direct mapping: index, tag, offset division
   • Show address mapping example and block placement
   • Advantages/disadvantages of direct mapping
9. 7 Marks
   aExplain the concept of instruction pipelining. How does pipelining improve the performance of a processor?
   How to answer

   • Define pipelining and stages (fetch, decode, execute etc.)
   • Explain overlapping execution and throughput gain
   • Formula for speedup, hazards mention
   • Diagram of pipeline timing
10. 7 Marks
    bWhat do you mean by Vector processing? How does it differ from scalar processing?
    How to answer

    • Define vector processing and scalar processing
    • Compare single-element vs array operations, hardware
    • Explain vector processor organization, pipelining
    • Applications
11. 7 Marks
    aDiscuss the role and working of Program Counter (PC), accumulator and instruction register in the CPU.
    How to answer

    • Define PC, accumulator, IR functions
    • Explain PC sequencing, accumulator ALU operations
    • Explain IR holding current instruction/opcode
    • Interaction in fetch-execute cycle
12. 7 Marks
    bAn instruction format has an opcode of 6 bits and a 2-address format. If the total instruction length is 16 bits, calculate how many distinct instructions can be formed, and how many different memory locations can be addressed?
    How to answer

    • Distinct instructions = 2^opcode bits = 2^6 = 64
    • Address bits per operand = (16-6)/2 = 5 bits
    • Addressable locations = 2^5 = 32
    • Explain 2-address format structure
13. 7 Marks
    aDifferentiate between synchronous and asynchronous data transfer modes.
    How to answer

    • Define synchronous transfer with common clock
    • Define asynchronous with handshaking/strobe
    • Compare timing, speed, cost, complexity in table
    • Examples
14. 7 Marks
    bDiscuss the concept of floating-point and decimal arithmetic, and how these are handled by the arithmetic unit.
    How to answer

    • Define floating-point format (sign, exponent, mantissa)
    • Define decimal arithmetic (BCD)
    • Explain ALU handling: alignment, normalization, correction
    • Examples IEEE 754
15. 14 Marks
    Write short notes on : (Any four)

    1. a)Interconnection Structure
    2. b)Addressing Modes
    3. c)Micro program sequencer
    4. d)Design of arithmetic unit
    5. e)Virtual Memory
    How to answer

    • Interconnection: buses, point-to-point
    • Addressing modes: immediate, direct, indirect etc. with examples
    • Microprogram sequencer: next-address logic
    • Arithmetic unit design and virtual memory concept