UNIT 5: ANALOG CIRCUITS - EXAM-FOCUSED SHORT NOTES
1.0 INTEGRATED CIRCUITS (ICs) - FUNDAMENTALS
Definition: An Integrated Circuit (IC) is a miniaturized electronic circuit fabricated on a single piece of semiconductor material (chip), combining transistors, diodes, resistors, capacitors, and interconnections.
Advantages over Discrete Circuits:
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Size & Cost: Extremely small, mass-produced → low cost.
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Reliability: Fewer solder joints/connections → higher reliability.
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Power Consumption: Low power due to small component sizes.
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Performance: High speed (short interconnections), matched components, good temperature stability.
Disadvantages:
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Fabrication Limitations: Difficulty in fabricating high-value resistors, large capacitors, or inductors on-chip.
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Fragility: Sensitive to overloads (static, voltage, current).
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Repair: Entire chip must be replaced if one component fails.
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Design Flexibility: Circuit parameters are fixed after fabrication (except for a few adjustable pins).
Basic Building Blocks (Monolithic Fabrication):
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Transistors & Diodes: Formed by diffusing impurities into silicon substrate.
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Resistors: Formed by doped semiconductor regions (low value) or thin-film deposits.
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Capacitors: Formed by metal-insulator-semiconductor or metal-oxide-metal structures (small values, pF-nF).
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Interconnections: Aluminum or copper metal layers.
Datasheets:
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Purpose: The definitive technical document provided by the manufacturer.
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Key Information:
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Absolute Maximum Ratings: Limits to prevent damage (supply voltage, power dissipation, temperature).
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Electrical Characteristics: Typical values at specified conditions (input offset voltage, bias current, gain, bandwidth).
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Functional Description/Pin Configuration: Pin diagram and function of each pin.
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Timing Diagrams/Waveforms: Input-output relationships over time.
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Application Circuits: Example circuits demonstrating typical use.
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[!TIP] EXAM TIP: Datasheet questions often ask to interpret Absolute Maximum Ratings vs. Electrical Characteristics or identify pin functions from a given diagram (e.g., 741, 555, LM317).
2.0 OPERATIONAL AMPLIFIER (OP-AMP) - CORE CONCEPTS
2.1 Ideal Op-Amp Characteristics:
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Infinite open-loop voltage gain ($$\displaystyle A_{OL} \to \infty $$)
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Infinite input impedance ($$\displaystyle Z_{in} \to \infty $$)
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Zero output impedance ($$\displaystyle Z_{out} = 0 $$)
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Infinite bandwidth (gain constant for all frequencies)
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Zero input offset voltage ($$\displaystyle V_{io} = 0 $$)
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Infinite Common-Mode Rejection Ratio (CMRR $\to \infty$)
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Infinite slew rate (SR $\to \infty$)
2.2 Practical Op-Amp Parameters (Key for Numerical Problems):
| Parameter | Symbol | Definition | Typical Cause | Effect on Circuit |
|---|---|---|---|---|
| Input Offset Voltage | $$\displaystyle V_{io} $$ | Voltage required at input to make output zero. | Mismatch in input differential pair. | Output error voltage $$\displaystyle V_{out(offset)} = A_{OL} \cdot V_{io} $$. |
| Input Bias Current | $$\displaystyle I_B $$ | Average DC current flowing into each input. | Base current of input transistors. | Creates offset if source resistances are unequal. |
| Input Offset Current | $$\displaystyle I_{io} $$ | Difference between the two input bias currents. | Mismatch in input transistors. | Contributes to output offset. |
| CMRR | CMRR | Ratio of differential gain to common-mode gain. $$\displaystyle \text{CMRR} = \frac{A_d}{A_{cm}} $$ | Imperfect symmetry in input stage. | Limits rejection of noise/ interference common to both inputs. |
| Slew Rate | SR | Maximum rate of change of output voltage. $$\displaystyle \text{SR} = \frac{dV_{out}}{dt}\bigg|_{max} $$ | Limited current available to charge internal compensation capacitor. | Limits full-power bandwidth: $$\displaystyle f_{max} = \frac{\text{SR}}{2\pi V_{out(pk)}} $$ |
| PSRR | PSRR | Ratio of change in supply voltage to change in input offset voltage. | Imperfect power supply regulation inside. | Output varies with supply fluctuations. |
| Gain-Bandwidth Product | GBP | Constant product of open-loop gain and frequency. $$\displaystyle A_{OL} \times f = \text{GBP} $$ | Internal compensation capacitor. | As gain decreases, bandwidth increases proportionally. |
2.3 The 741 Op-Amp IC:
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Pin Configuration (8-pin DIP):
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Offset Null: Used to nullify $$\displaystyle V_{io} $$.
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Inverting Input (-)
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Non-inverting Input (+)
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V-: Negative supply (typically -15V).
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Offset Null: (See Pin 1).
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Output
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V+: Positive supply (typically +15V).
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NC: No Connection.
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Internal Block Diagram (Conceptual): Input differential stage → Gain stage → Output stage → Frequency compensation.
3.0 DIFFERENTIAL AMPLIFIER
3.1 Basic Principle: Amplifies the difference between two input signals ($$\displaystyle V_2 - V_1 $$) while rejecting any signal common to both inputs (common-mode signal).
3.2 Configurations & Output Expression:
For a basic diff-amp with emitter resistor $$\displaystyle R_E $$ and collector resistors $$\displaystyle R_{C1}=R_{C2}=R_C $$:
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Differential Voltage Gain: $$\displaystyle A_d = \frac{v_{out}}{v_d} = -g_m R_C $$ (for balanced output) or $$\displaystyle -g_m R_C/2 $$ (for single-ended output).
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Common-Mode Voltage Gain: $$\displaystyle A_{cm} = \frac{v_{out}}{v_{cm}} \approx -\frac{R_C}{2R_E} $$ (if $$\displaystyle R_E $$ is unbypassed).
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CMRR: $$\displaystyle \text{CMRR} = \frac{A_d}{A_{cm}} \approx 2g_m R_E $$. High CMRR is the key advantage.
3.4 Numerical Problem (Common Pattern):
Given: $$\displaystyle R_1 = R_2 = 10k\Omega $$, $$\displaystyle R_f = 20k\Omega $$ (in a difference amp config). Find $$\displaystyle V_{out} $$ for $$\displaystyle V_2 - V_1 = 2V $$.
Solution: $$\displaystyle V_{out} = \left(\frac{R_f}{R_1}\right) (V_2 - V_1) = \left(\frac{20k}{10k}\right) \times 2 = 4V $$.
3.5 Advantages & Applications:
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High CMRR: Rejects noise, 50/60Hz interference.
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Applications: Instrumentation amplifiers, long-line signal transmission, sensor interfaces (strain gauges, thermocouples).
4.0 FEEDBACK IN AMPLIFIERS
4.1 Concept: Returning a fraction of the output signal to the input.
- Block Diagram: $$\displaystyle A_{OL} $$ (open-loop gain), $\beta$ (feedback factor), $$\displaystyle A_f $$ (closed-loop gain). $$\displaystyle A_f = \frac{A_{OL}}{1 + A_{OL}\beta} $$ (Negative FB).
4.2 Types:
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Positive Feedback: Feedback signal in-phase with input. Used in oscillators. Can lead to instability.
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Negative Feedback: Feedback signal out-of-phase with input. Degenerative. Used for control and stabilization.
4.4 Advantages of Negative Feedback (with Justification):
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Gain Stability: $$\displaystyle \Delta A_f / A_f \approx \frac{1}{1+A_{OL}\beta} \cdot (\Delta A_{OL}/A_{OL}) $$. Gain becomes less dependent on $$\displaystyle A_{OL} $$.
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Bandwidth Increase: $$\displaystyle GBP = A_{OL} \times BW_{OL} = A_f \times BW_f \implies BW_f = (1+A_{OL}\beta) \times BW_{OL} $$. Gain-Bandwidth product is constant.
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Reduced Nonlinear Distortion: Distortion is reduced by factor $$\displaystyle (1+A_{OL}\beta) $$.
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Reduced Noise: Similar reduction factor for internally generated noise.
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Control of Impedances:
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Voltage-Series (Series-Shunt): $$\displaystyle Z_{in} \uparrow $$, $$\displaystyle Z_{out} \downarrow $$.
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Current-Series (Series-Series): $$\displaystyle Z_{in} \uparrow $$, $$\displaystyle Z_{out} \uparrow $$.
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Voltage-Shunt (Shunt-Shunt): $$\displaystyle Z_{in} \downarrow $$, $$\displaystyle Z_{out} \downarrow $$.
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Current-Shunt (Shunt-Series): $$\displaystyle Z_{in} \downarrow $$, $$\displaystyle Z_{out} \uparrow $$.
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4.5 Feedback Topologies Summary Table:
| Topology | Sampling | Mixing | Input Impedance | Output Impedance | Application | $$\displaystyle A_f $$ (approx) |
|---|---|---|---|---|---|---|
| Voltage-Series | Voltage | Series | Increases | Decreases | Voltage Amplifier | $1/\beta$ |
| Current-Series | Current | Series | Increases | Increases | Transconductance Amp. | $1/\beta$ |
| Voltage-Shunt | Voltage | Shunt | Decreases | Decreases | Current-to-Voltage Conv. | $$\displaystyle R_f $$ (if $$\displaystyle A_{OL}\beta \gg 1 $$) |
| Current-Shunt | Current | Shunt | Decreases | Increases | Transresistance Amp. | $$\displaystyle -R_f $$ |
4.6 Barkhausen Criterion for Oscillations:
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Condition: $$\displaystyle |A_{OL}\beta| = 1 $$ and $$\displaystyle \angle A_{OL}\beta = 0^\circ $$ (or $$\displaystyle 360^\circ $$).
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Importance: Determines the frequency and condition for sustained oscillations. If $$\displaystyle |A\beta| > 1 $$, amplitude grows (limited by nonlinearities). If $$\displaystyle |A\beta| < 1 $$, oscillations die out.
5.0 OSCILLATORS
5.1 Classification: RC (audio), LC (RF), Crystal (very stable frequency).
5.2 RC Oscillators:
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RC Phase Shift Oscillator:
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Circuit: 3 or 4 identical RC sections in feedback network + inverting amplifier (180° phase shift).
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Principle: Each RC section provides ~60° shift at a specific frequency → total 180° from network + 180° from amp = 360°.
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Frequency of Oscillation (3-section): \boxed{f = \frac{1}{2\pi RC\sqrt{6}}}
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Numerical: Given $$\displaystyle R=5k\Omega $$, $$\displaystyle C=0.01\mu F $$, $$\displaystyle f = \frac{1}{2\pi \times 5 \times 10^3 \times 0.01 \times 10^{-6} \times \sqrt{6}} \approx 1.3\,kHz $$.
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Limitation: Poor frequency stability, low frequency range (<100kHz).
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Wien Bridge Oscillator:
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Circuit: Non-inverting op-amp with series RC (lead) and parallel RC (lag) network in positive feedback path.
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Principle: At $$\displaystyle f_0 = \frac{1}{2\pi RC} $$, network phase shift = 0°, and attenuation = 1/3. Loop gain = $$\displaystyle A_{OL}/3 $$. For oscillation, $$\displaystyle A_{OL} \geq 3 $$.
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Advantages: Good frequency stability, low distortion, easy tuning.
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Limitation: Requires amplitude stabilization (nonlinear resistor: lamp, thermistor, diodes, FET) to prevent distortion/cutoff. Limited to audio frequencies.
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5.3 LC Oscillators:
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Hartley Oscillator:
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Circuit: Tank circuit with tapped coil or split inductor ($$\displaystyle L_1, L_2 $$) and capacitor $C$.
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Frequency: $$\displaystyle f = \frac{1}{2\pi \sqrt{C(L_1+L_2)}} $$ (approx, ignoring mutual inductance).
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Feedback Fraction: $$\displaystyle \beta \approx L_2 / L_1 $$.
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Colpitt's Oscillator:
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Circuit: Tank circuit with split capacitor ($$\displaystyle C_1, C_2 $$) and inductor $L$.
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Frequency: $$\displaystyle f = \frac{1}{2\pi \sqrt{L \cdot \frac{C_1 C_2}{C_1+C_2}}} $$.
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Feedback Fraction: $$\displaystyle \beta \approx C_1 / C_2 $$.
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Generalized Analysis: Oscillator frequency determined by parallel resonant circuit. $\beta$ determined by tap ratio (inductive or capacitive voltage divider).
6.0 FILTERS
6.1 Purpose: Frequency-selective circuits that pass desired frequencies and reject/attenuate others.
6.2 Key Characteristics:
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Magnitude Response: $|H(j\omega)|$ vs. $\omega$ (Gain vs. Frequency).
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Frequency Response: $\angle H(j\omega)$ vs. $\omega$ (Phase vs. Frequency).
6.3 Filter Types:
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Low-Pass (LPF): Passes $$\displaystyle f < f_c $$, attenuates $$\displaystyle f > f_c $$.
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High-Pass (HPF): Passes $$\displaystyle f > f_c $$, attenuates $$\displaystyle f < f_c $$.
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Band-Pass: Passes a band of frequencies.
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Band-Stop (Notch): Rejects a band of frequencies.
6.4 Butterworth Filter (Maximally Flat Magnitude):
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1st Order LPF (Op-Amp):
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Circuit: Inverting op-amp with feedback resistor $$\displaystyle R_f $$ and input capacitor $C$ (or non-inverting with RC network).
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Cutoff Frequency: \boxed{f_c = \frac{1}{2\pi RC}}
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Gain: $$\displaystyle A_v(s) = \frac{-R_f}{R_1} \cdot \frac{1}{1 + sRC} $$ (for inverting).
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Roll-off: -20 dB/decade.
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2nd Order LPF (Sallen-Key Unity Gain):
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Circuit: Non-inverting op-amp with two capacitors and two resistors in feedback/input network.
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Design for Butterworth: $$\displaystyle Q = 0.707 $$. Component selection: $$\displaystyle R_1 = R_2 = R $$, $$\displaystyle C_1 = C_2 = C $$ gives $$\displaystyle f_c = \frac{1}{2\pi RC} $$.
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Roll-off: -40 dB/decade.
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7.0 OP-AMP APPLICATIONS - ACTIVE CIRCUITS
7.1 Integrator:
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Circuit: Inverting op-amp with capacitor $$\displaystyle C_f $$ in feedback, resistor $R$ at input.
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Analysis: $$\displaystyle V_{out} = -\frac{1}{R C_f} \int V_{in} dt $$.
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Waveform: Square input → Triangular output. Ramp input → Parabolic output.
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Practical: Add large resistor $$\displaystyle R_f $$ in parallel with $$\displaystyle C_f $$ to prevent DC offset saturation. Use switch to reset capacitor.
7.2 Differentiator:
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Circuit: Inverting op-amp with capacitor $C$ at input, resistor $$\displaystyle R_f $$ in feedback.
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Analysis: $$\displaystyle V_{out} = -R_f C \frac{dV_{in}}{dt} $$.
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Waveform: Triangular input → Square output. Ramp input → Constant output.
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Limitations: Amplifies high-frequency noise → unstable. Practical Improvement: Add resistor $R$ in series with $C$ and capacitor $$\displaystyle C_f $$ in parallel with $$\displaystyle R_f $$ to form a band-pass differentiator.
7.3 Instrumentation Amplifier:
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Need: Very high CMRR, high input impedance, high gain, single-ended output.
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Structure: 3 Op-Amps. Two input buffer stages (high $$\displaystyle Z_{in} $$) followed by a difference amplifier.
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Output Expression (Matched Resistors): \boxed{V_{out} = \left(1 + \frac{2R_2}{R_1}\right) \frac{R_4}{R_3} (V_2 - V_1)}
- Gain set by $$\displaystyle R_1, R_2 $$ (first stage). $$\displaystyle R_3, R_4 $$ set second stage gain (usually =1).
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Advantage: CMRR is determined primarily by the last stage resistor matching, not the input transistors.
7.4 Voltage-Shunt Feedback (Current-to-Voltage Converter):
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Circuit: Non-inverting input grounded. Feedback resistor $$\displaystyle R_f $$ from output to inverting input. Input current $$\displaystyle I_{in} $$ applied to inverting node.
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Analysis: Virtual ground at inverting input. $$\displaystyle I_{in} = I_{R_f} \implies V_{out} = -I_{in} R_f $$.
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Application: Transimpedance amplifier for photodiodes, current-output sensors.
7.5 Zero Crossing Detector:
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Circuit: Op-amp comparator without positive feedback. $$\displaystyle V_+ $$ grounded, $$\displaystyle V_- $$ is input.
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Operation: $$\displaystyle V_{in} > 0 \rightarrow V_{out} = +V_{sat} $$; $$\displaystyle V_{in} < 0 \rightarrow V_{out} = -V_{sat} $$.
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Output: Switches state precisely when $$\displaystyle V_{in} $$ crosses 0V. Used for phase measurement, frequency counting.
7.6 Peak Detector:
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Circuit: Op-amp voltage follower driving a diode ($$\displaystyle D_1 $$), capacitor ($$\displaystyle C_{hold} $$), and load resistor ($$\displaystyle R_L $$). Diode $$\displaystyle D_2 $$ provides discharge path.
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Operation: When $$\displaystyle V_{in} > V_{cap} $$, $$\displaystyle D_1 $$ forward-biased, capacitor charges to peak. When $$\displaystyle V_{in} < V_{cap} $$, $$\displaystyle D_1 $$ reverse-biased, capacitor holds peak via $$\displaystyle D_2 $$ (slow discharge through $$\displaystyle R_L $$).
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Need for Buffer: Prevents capacitor discharge through load.
7.7 Sample and Hold (S/H):
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Circuit: Voltage follower (op-amp) with switch (FET) and hold capacitor.
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Modes:
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Sample: Switch closed, capacitor charges to $$\displaystyle V_{in} $$.
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Hold: Switch open, capacitor holds voltage.
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Application: Analog-to-Digital Converters (ADCs). Input must be stable during conversion.
8.0 555 TIMER IC
8.1 Internal Block Diagram & Pins:
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Pin 1 (GND)
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Pin 2 (Trigger): Negative trigger (< 1/3 Vcc) sets output high.
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Pin 3 (Output): Push-pull output.
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Pin 4 (Reset): Active low. Forces output low when < 0.7V.
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Pin 5 (Control Voltage): Access to internal voltage divider (2/3 Vcc). External voltage changes thresholds.
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Pin 6 (Threshold): Positive trigger (> 2/3 Vcc) resets output low.
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Pin 7 (Discharge): Open-collector output to discharge timing capacitor.
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Pin 8 (Vcc)
8.2 Astable Multivibrator (Oscillator):
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Circuit: $$\displaystyle R_A $$, $$\displaystyle R_B $$, $C$ connected between pins 7, 6, 2, and GND.
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Working: Capacitor $C$ charges via $$\displaystyle R_A+R_B $$ to 2/3 Vcc (threshold) → output low, discharge pin on. $C$ discharges via $$\displaystyle R_B $$ to 1/3 Vcc (trigger) → output high, discharge pin off. Cycle repeats.
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Time Periods:
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$$\displaystyle T_{high} = 0.693 (R_A + R_B) C $$
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$$\displaystyle T_{low} = 0.693 R_B C $$
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Total Period: $$\displaystyle T = T_{high} + T_{low} = 0.693 (R_A + 2R_B) C $$
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Frequency: $$\displaystyle f = \frac{1}{T} = \frac{1.44}{(R_A + 2R_B)C} $$
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Duty Cycle: $$\displaystyle D = \frac{T_{high}}{T} = \frac{R_A + R_B}{R_A + 2R_B} $$ (>50% always).
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8.3 Monostable Multivibrator (One-Shot):
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Circuit: $R$, $C$ connected between pins 7 and 6. Trigger pulse applied to pin 2 (negative-going).
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Working: Trigger makes output high. $C$ charges via $R$ to 2/3 Vcc. When threshold reached, output goes low, $C$ discharges via pin 7.
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Pulse Width: \boxed{T = 1.1 RC}
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Note: Output remains high as long as trigger is low, but width determined by $RC$.
8.4 Schmitt Trigger using 555:
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Circuit: Use Threshold (Pin 6) and Trigger (Pin 2) pins as inputs. Connect them together. Output at Pin 3.
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Operation: Hysteresis due to internal voltage divider.
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Upper Threshold (UTP): $$\displaystyle V_{UTP} = \frac{2}{3} V_{cc} $$
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Lower Threshold (LTP): $$\displaystyle V_{LTP} = \frac{1}{3} V_{cc} $$
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Application: Waveform shaping (sine to square), noise immunity.
9.0 VOLTAGE REGULATORS
9.1 Need: Provide stable, constant DC voltage despite changes in AC line voltage or load current.
9.2 Classification:
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Linear Regulators: Series (pass transistor in series) or Shunt (parallel Zener). Simple, low noise, inefficient (high power dissipation).
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Switching Regulators: Step-down (Buck), Step-up (Boost), Inverting. Efficient, noisy, complex.
9.3 Fixed Voltage Regulators (78xx/79xx):
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78xx: Positive output (e.g., 7805 → +5V).
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79xx: Negative output (e.g., 7905 → -5V).
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Features: Internal current limiting, thermal shutdown. Need input at least 2V higher than output.
9.4 Adjustable Voltage Regulators:
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LM317 (Positive):
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Pins: 1=Adj, 2=Output, 3=Input.
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Output Voltage Formula: \boxed{V_{out} = 1.25V \left(1 + \frac{R_2}{R_1}\right) + I_{adj} R_2}
- $$\displaystyle I_{adj} $$ (~50µA) often negligible. $$\displaystyle V_{ref} = 1.25V $$.
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Range: 1.25V to ~37V.
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Features: Current limiting, thermal shutdown, adjustable with two resistors.
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LM337 (Negative): Similar, for negative outputs.
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Advantage over Fixed: Single device provides any voltage within range → flexibility, less inventory.
9.5 Characteristics of Linear Regulators:
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Line Regulation: $$\displaystyle \frac{\Delta V_{out}}{\Delta V_{in}} $$ (%/V or mV/V). Measures sensitivity to input voltage change.
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Load Regulation: $$\displaystyle \frac{\Delta V_{out}}{\Delta I_{load}} $$ (mV/mA or %/A). Measures sensitivity to load current change.
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Ripple Rejection (PSRR): Ability to reject AC ripple on input.
10.0 SPECIALIZED CIRCUITS & ADDITIONAL TOPICS
10.1 Voltage Controlled Oscillator (VCO):
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Principle: Oscillation frequency $$\displaystyle f_0 $$ is a function of input control voltage $$\displaystyle V_{ctrl} $$.
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Application: Phase-Locked Loops (PLLs), Frequency Modulation (FM) generation.
10.2 Clipper and Clamper Circuits:
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Clippers: "Clip" or remove part of input waveform.
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Series Clipper: Diode in series with load.
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Shunt Clipper: Diode in parallel with load (reverse or forward biased).
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Transfer Characteristic: Piecewise linear, with a "knee" at diode forward voltage (~0.7V).
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Clampers: Add a DC level to the AC signal (shift entire waveform up/down).
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Positive Peak Clamper: Clamps negative peak to 0V (output shifted up).
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Negative Peak Clamper: Clamps positive peak to 0V (output shifted down).
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Operation: Uses diode + capacitor. Capacitor charges to peak input during one half-cycle and acts as a battery during the other.
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10.3 Dual Power Supply:
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Need: Op-amps often require symmetrical supplies (e.g., ±15V) for AC-coupled signals.
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Generation Methods:
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Two Separate Supplies: Most straightforward.
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Virtual Ground: Create a "midpoint" at half the single supply voltage using a voltage divider + buffer. Not a true dual supply (output swing limited).
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Charge Pump IC (e.g., ICL7660): Switched-capacitor inverter to generate negative rail from positive.
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10.4 Effect of Input Offset Parameters on Accuracy:
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Output Offset Voltage ($$\displaystyle V_{oo} $$): Combined effect of $$\displaystyle V_{io} $$, $$\displaystyle I_B $$, $$\displaystyle I_{io} $$ and external resistors.
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Inverting Amplifier: $$\displaystyle V_{oo} \approx -V_{io} \left(1 + \frac{R_f}{R_1}\right) - I_{B-} R_f + I_{B+} R_1 $$ (if $$\displaystyle R_1 \parallel R_f $$ used to balance $$\displaystyle I_B $$).
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Non-inverting Amplifier: $$\displaystyle V_{oo} \approx V_{io} \left(1 + \frac{R_f}{R_1}\right) + I_{B-} R_f $$ (if $$\displaystyle R_1 \parallel R_f $$ used).
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Minimization Techniques:
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Use offset null pins (741).
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Add balancing resistor $$\displaystyle R_1 \parallel R_f $$ in inverting config to balance input bias current effects.
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Choose low $$\displaystyle I_B $$ op-amps (FET-input).
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Precise resistor matching.
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[!TIP] COMMON PITFALL: Forgetting to add the balancing resistor $$\displaystyle R_{bal} = R_1 \parallel R_f $$ in inverting amplifier configurations to cancel $$\displaystyle I_B $$-induced offset. Always check this in numerical problems.
SYLLABUS ALIGNMENT: All sections above strictly follow the APPROVED OUTLINE BLUEPRINT and prioritize topics highlighted in the HISTORICAL EXAM CONTEXT (past 5 papers). Key formulas and definitions are boxed for quick recall.