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EC-405 · Analog Circuits/Quick Revision Short Notes

Analog Circuits (EC-405) - Unit 5 Short Notes

UNIT 5: ANALOG CIRCUITS - EXAM-FOCUSED SHORT NOTES


1.0 INTEGRATED CIRCUITS (ICs) - FUNDAMENTALS

Definition: An Integrated Circuit (IC) is a miniaturized electronic circuit fabricated on a single piece of semiconductor material (chip), combining transistors, diodes, resistors, capacitors, and interconnections.

Advantages over Discrete Circuits:

  • Size & Cost: Extremely small, mass-produced → low cost.

  • Reliability: Fewer solder joints/connections → higher reliability.

  • Power Consumption: Low power due to small component sizes.

  • Performance: High speed (short interconnections), matched components, good temperature stability.

Disadvantages:

  • Fabrication Limitations: Difficulty in fabricating high-value resistors, large capacitors, or inductors on-chip.

  • Fragility: Sensitive to overloads (static, voltage, current).

  • Repair: Entire chip must be replaced if one component fails.

  • Design Flexibility: Circuit parameters are fixed after fabrication (except for a few adjustable pins).

Basic Building Blocks (Monolithic Fabrication):

  • Transistors & Diodes: Formed by diffusing impurities into silicon substrate.

  • Resistors: Formed by doped semiconductor regions (low value) or thin-film deposits.

  • Capacitors: Formed by metal-insulator-semiconductor or metal-oxide-metal structures (small values, pF-nF).

  • Interconnections: Aluminum or copper metal layers.

Datasheets:

  • Purpose: The definitive technical document provided by the manufacturer.

  • Key Information:

    • Absolute Maximum Ratings: Limits to prevent damage (supply voltage, power dissipation, temperature).

    • Electrical Characteristics: Typical values at specified conditions (input offset voltage, bias current, gain, bandwidth).

    • Functional Description/Pin Configuration: Pin diagram and function of each pin.

    • Timing Diagrams/Waveforms: Input-output relationships over time.

    • Application Circuits: Example circuits demonstrating typical use.

[!TIP] EXAM TIP: Datasheet questions often ask to interpret Absolute Maximum Ratings vs. Electrical Characteristics or identify pin functions from a given diagram (e.g., 741, 555, LM317).


2.0 OPERATIONAL AMPLIFIER (OP-AMP) - CORE CONCEPTS

2.1 Ideal Op-Amp Characteristics:

  • Infinite open-loop voltage gain ($$\displaystyle A_{OL} \to \infty $$)

  • Infinite input impedance ($$\displaystyle Z_{in} \to \infty $$)

  • Zero output impedance ($$\displaystyle Z_{out} = 0 $$)

  • Infinite bandwidth (gain constant for all frequencies)

  • Zero input offset voltage ($$\displaystyle V_{io} = 0 $$)

  • Infinite Common-Mode Rejection Ratio (CMRR $\to \infty$)

  • Infinite slew rate (SR $\to \infty$)

2.2 Practical Op-Amp Parameters (Key for Numerical Problems):

Parameter Symbol Definition Typical Cause Effect on Circuit
Input Offset Voltage $$\displaystyle V_{io} $$ Voltage required at input to make output zero. Mismatch in input differential pair. Output error voltage $$\displaystyle V_{out(offset)} = A_{OL} \cdot V_{io} $$.
Input Bias Current $$\displaystyle I_B $$ Average DC current flowing into each input. Base current of input transistors. Creates offset if source resistances are unequal.
Input Offset Current $$\displaystyle I_{io} $$ Difference between the two input bias currents. Mismatch in input transistors. Contributes to output offset.
CMRR CMRR Ratio of differential gain to common-mode gain. $$\displaystyle \text{CMRR} = \frac{A_d}{A_{cm}} $$ Imperfect symmetry in input stage. Limits rejection of noise/ interference common to both inputs.
Slew Rate SR Maximum rate of change of output voltage. $$\displaystyle \text{SR} = \frac{dV_{out}}{dt}\bigg|_{max} $$ Limited current available to charge internal compensation capacitor. Limits full-power bandwidth: $$\displaystyle f_{max} = \frac{\text{SR}}{2\pi V_{out(pk)}} $$
PSRR PSRR Ratio of change in supply voltage to change in input offset voltage. Imperfect power supply regulation inside. Output varies with supply fluctuations.
Gain-Bandwidth Product GBP Constant product of open-loop gain and frequency. $$\displaystyle A_{OL} \times f = \text{GBP} $$ Internal compensation capacitor. As gain decreases, bandwidth increases proportionally.

2.3 The 741 Op-Amp IC:

  • Pin Configuration (8-pin DIP):

    1. Offset Null: Used to nullify $$\displaystyle V_{io} $$.

    2. Inverting Input (-)

    3. Non-inverting Input (+)

    4. V-: Negative supply (typically -15V).

    5. Offset Null: (See Pin 1).

    6. Output

    7. V+: Positive supply (typically +15V).

    8. NC: No Connection.

  • Internal Block Diagram (Conceptual): Input differential stage → Gain stage → Output stage → Frequency compensation.


3.0 DIFFERENTIAL AMPLIFIER

3.1 Basic Principle: Amplifies the difference between two input signals ($$\displaystyle V_2 - V_1 $$) while rejecting any signal common to both inputs (common-mode signal).

3.2 Configurations & Output Expression:

For a basic diff-amp with emitter resistor $$\displaystyle R_E $$ and collector resistors $$\displaystyle R_{C1}=R_{C2}=R_C $$:

  • Differential Voltage Gain: $$\displaystyle A_d = \frac{v_{out}}{v_d} = -g_m R_C $$ (for balanced output) or $$\displaystyle -g_m R_C/2 $$ (for single-ended output).

  • Common-Mode Voltage Gain: $$\displaystyle A_{cm} = \frac{v_{out}}{v_{cm}} \approx -\frac{R_C}{2R_E} $$ (if $$\displaystyle R_E $$ is unbypassed).

  • CMRR: $$\displaystyle \text{CMRR} = \frac{A_d}{A_{cm}} \approx 2g_m R_E $$. High CMRR is the key advantage.

3.4 Numerical Problem (Common Pattern):

Given: $$\displaystyle R_1 = R_2 = 10k\Omega $$, $$\displaystyle R_f = 20k\Omega $$ (in a difference amp config). Find $$\displaystyle V_{out} $$ for $$\displaystyle V_2 - V_1 = 2V $$.

Solution: $$\displaystyle V_{out} = \left(\frac{R_f}{R_1}\right) (V_2 - V_1) = \left(\frac{20k}{10k}\right) \times 2 = 4V $$.

3.5 Advantages & Applications:

  • High CMRR: Rejects noise, 50/60Hz interference.

  • Applications: Instrumentation amplifiers, long-line signal transmission, sensor interfaces (strain gauges, thermocouples).


4.0 FEEDBACK IN AMPLIFIERS

4.1 Concept: Returning a fraction of the output signal to the input.

  • Block Diagram: $$\displaystyle A_{OL} $$ (open-loop gain), $\beta$ (feedback factor), $$\displaystyle A_f $$ (closed-loop gain). $$\displaystyle A_f = \frac{A_{OL}}{1 + A_{OL}\beta} $$ (Negative FB).

4.2 Types:

  • Positive Feedback: Feedback signal in-phase with input. Used in oscillators. Can lead to instability.

  • Negative Feedback: Feedback signal out-of-phase with input. Degenerative. Used for control and stabilization.

4.4 Advantages of Negative Feedback (with Justification):

  1. Gain Stability: $$\displaystyle \Delta A_f / A_f \approx \frac{1}{1+A_{OL}\beta} \cdot (\Delta A_{OL}/A_{OL}) $$. Gain becomes less dependent on $$\displaystyle A_{OL} $$.

  2. Bandwidth Increase: $$\displaystyle GBP = A_{OL} \times BW_{OL} = A_f \times BW_f \implies BW_f = (1+A_{OL}\beta) \times BW_{OL} $$. Gain-Bandwidth product is constant.

  3. Reduced Nonlinear Distortion: Distortion is reduced by factor $$\displaystyle (1+A_{OL}\beta) $$.

  4. Reduced Noise: Similar reduction factor for internally generated noise.

  5. Control of Impedances:

    • Voltage-Series (Series-Shunt): $$\displaystyle Z_{in} \uparrow $$, $$\displaystyle Z_{out} \downarrow $$.

    • Current-Series (Series-Series): $$\displaystyle Z_{in} \uparrow $$, $$\displaystyle Z_{out} \uparrow $$.

    • Voltage-Shunt (Shunt-Shunt): $$\displaystyle Z_{in} \downarrow $$, $$\displaystyle Z_{out} \downarrow $$.

    • Current-Shunt (Shunt-Series): $$\displaystyle Z_{in} \downarrow $$, $$\displaystyle Z_{out} \uparrow $$.

4.5 Feedback Topologies Summary Table:

Topology Sampling Mixing Input Impedance Output Impedance Application $$\displaystyle A_f $$ (approx)
Voltage-Series Voltage Series Increases Decreases Voltage Amplifier $1/\beta$
Current-Series Current Series Increases Increases Transconductance Amp. $1/\beta$
Voltage-Shunt Voltage Shunt Decreases Decreases Current-to-Voltage Conv. $$\displaystyle R_f $$ (if $$\displaystyle A_{OL}\beta \gg 1 $$)
Current-Shunt Current Shunt Decreases Increases Transresistance Amp. $$\displaystyle -R_f $$

4.6 Barkhausen Criterion for Oscillations:

  • Condition: $$\displaystyle |A_{OL}\beta| = 1 $$ and $$\displaystyle \angle A_{OL}\beta = 0^\circ $$ (or $$\displaystyle 360^\circ $$).

  • Importance: Determines the frequency and condition for sustained oscillations. If $$\displaystyle |A\beta| > 1 $$, amplitude grows (limited by nonlinearities). If $$\displaystyle |A\beta| < 1 $$, oscillations die out.


5.0 OSCILLATORS

5.1 Classification: RC (audio), LC (RF), Crystal (very stable frequency).

5.2 RC Oscillators:

  • RC Phase Shift Oscillator:

    • Circuit: 3 or 4 identical RC sections in feedback network + inverting amplifier (180° phase shift).

    • Principle: Each RC section provides ~60° shift at a specific frequency → total 180° from network + 180° from amp = 360°.

    • Frequency of Oscillation (3-section): \boxed{f = \frac{1}{2\pi RC\sqrt{6}}}

    • Numerical: Given $$\displaystyle R=5k\Omega $$, $$\displaystyle C=0.01\mu F $$, $$\displaystyle f = \frac{1}{2\pi \times 5 \times 10^3 \times 0.01 \times 10^{-6} \times \sqrt{6}} \approx 1.3\,kHz $$.

    • Limitation: Poor frequency stability, low frequency range (<100kHz).

  • Wien Bridge Oscillator:

    • Circuit: Non-inverting op-amp with series RC (lead) and parallel RC (lag) network in positive feedback path.

    • Principle: At $$\displaystyle f_0 = \frac{1}{2\pi RC} $$, network phase shift = 0°, and attenuation = 1/3. Loop gain = $$\displaystyle A_{OL}/3 $$. For oscillation, $$\displaystyle A_{OL} \geq 3 $$.

    • Advantages: Good frequency stability, low distortion, easy tuning.

    • Limitation: Requires amplitude stabilization (nonlinear resistor: lamp, thermistor, diodes, FET) to prevent distortion/cutoff. Limited to audio frequencies.

5.3 LC Oscillators:

  • Hartley Oscillator:

    • Circuit: Tank circuit with tapped coil or split inductor ($$\displaystyle L_1, L_2 $$) and capacitor $C$.

    • Frequency: $$\displaystyle f = \frac{1}{2\pi \sqrt{C(L_1+L_2)}} $$ (approx, ignoring mutual inductance).

    • Feedback Fraction: $$\displaystyle \beta \approx L_2 / L_1 $$.

  • Colpitt's Oscillator:

    • Circuit: Tank circuit with split capacitor ($$\displaystyle C_1, C_2 $$) and inductor $L$.

    • Frequency: $$\displaystyle f = \frac{1}{2\pi \sqrt{L \cdot \frac{C_1 C_2}{C_1+C_2}}} $$.

    • Feedback Fraction: $$\displaystyle \beta \approx C_1 / C_2 $$.

  • Generalized Analysis: Oscillator frequency determined by parallel resonant circuit. $\beta$ determined by tap ratio (inductive or capacitive voltage divider).


6.0 FILTERS

6.1 Purpose: Frequency-selective circuits that pass desired frequencies and reject/attenuate others.

6.2 Key Characteristics:

  • Magnitude Response: $|H(j\omega)|$ vs. $\omega$ (Gain vs. Frequency).

  • Frequency Response: $\angle H(j\omega)$ vs. $\omega$ (Phase vs. Frequency).

6.3 Filter Types:

  • Low-Pass (LPF): Passes $$\displaystyle f < f_c $$, attenuates $$\displaystyle f > f_c $$.

  • High-Pass (HPF): Passes $$\displaystyle f > f_c $$, attenuates $$\displaystyle f < f_c $$.

  • Band-Pass: Passes a band of frequencies.

  • Band-Stop (Notch): Rejects a band of frequencies.

6.4 Butterworth Filter (Maximally Flat Magnitude):

  • 1st Order LPF (Op-Amp):

    • Circuit: Inverting op-amp with feedback resistor $$\displaystyle R_f $$ and input capacitor $C$ (or non-inverting with RC network).

    • Cutoff Frequency: \boxed{f_c = \frac{1}{2\pi RC}}

    • Gain: $$\displaystyle A_v(s) = \frac{-R_f}{R_1} \cdot \frac{1}{1 + sRC} $$ (for inverting).

    • Roll-off: -20 dB/decade.

  • 2nd Order LPF (Sallen-Key Unity Gain):

    • Circuit: Non-inverting op-amp with two capacitors and two resistors in feedback/input network.

    • Design for Butterworth: $$\displaystyle Q = 0.707 $$. Component selection: $$\displaystyle R_1 = R_2 = R $$, $$\displaystyle C_1 = C_2 = C $$ gives $$\displaystyle f_c = \frac{1}{2\pi RC} $$.

    • Roll-off: -40 dB/decade.


7.0 OP-AMP APPLICATIONS - ACTIVE CIRCUITS

7.1 Integrator:

  • Circuit: Inverting op-amp with capacitor $$\displaystyle C_f $$ in feedback, resistor $R$ at input.

  • Analysis: $$\displaystyle V_{out} = -\frac{1}{R C_f} \int V_{in} dt $$.

  • Waveform: Square input → Triangular output. Ramp input → Parabolic output.

  • Practical: Add large resistor $$\displaystyle R_f $$ in parallel with $$\displaystyle C_f $$ to prevent DC offset saturation. Use switch to reset capacitor.

7.2 Differentiator:

  • Circuit: Inverting op-amp with capacitor $C$ at input, resistor $$\displaystyle R_f $$ in feedback.

  • Analysis: $$\displaystyle V_{out} = -R_f C \frac{dV_{in}}{dt} $$.

  • Waveform: Triangular input → Square output. Ramp input → Constant output.

  • Limitations: Amplifies high-frequency noise → unstable. Practical Improvement: Add resistor $R$ in series with $C$ and capacitor $$\displaystyle C_f $$ in parallel with $$\displaystyle R_f $$ to form a band-pass differentiator.

7.3 Instrumentation Amplifier:

  • Need: Very high CMRR, high input impedance, high gain, single-ended output.

  • Structure: 3 Op-Amps. Two input buffer stages (high $$\displaystyle Z_{in} $$) followed by a difference amplifier.

  • Output Expression (Matched Resistors): \boxed{V_{out} = \left(1 + \frac{2R_2}{R_1}\right) \frac{R_4}{R_3} (V_2 - V_1)}

    • Gain set by $$\displaystyle R_1, R_2 $$ (first stage). $$\displaystyle R_3, R_4 $$ set second stage gain (usually =1).
  • Advantage: CMRR is determined primarily by the last stage resistor matching, not the input transistors.

7.4 Voltage-Shunt Feedback (Current-to-Voltage Converter):

  • Circuit: Non-inverting input grounded. Feedback resistor $$\displaystyle R_f $$ from output to inverting input. Input current $$\displaystyle I_{in} $$ applied to inverting node.

  • Analysis: Virtual ground at inverting input. $$\displaystyle I_{in} = I_{R_f} \implies V_{out} = -I_{in} R_f $$.

  • Application: Transimpedance amplifier for photodiodes, current-output sensors.

7.5 Zero Crossing Detector:

  • Circuit: Op-amp comparator without positive feedback. $$\displaystyle V_+ $$ grounded, $$\displaystyle V_- $$ is input.

  • Operation: $$\displaystyle V_{in} > 0 \rightarrow V_{out} = +V_{sat} $$; $$\displaystyle V_{in} < 0 \rightarrow V_{out} = -V_{sat} $$.

  • Output: Switches state precisely when $$\displaystyle V_{in} $$ crosses 0V. Used for phase measurement, frequency counting.

7.6 Peak Detector:

  • Circuit: Op-amp voltage follower driving a diode ($$\displaystyle D_1 $$), capacitor ($$\displaystyle C_{hold} $$), and load resistor ($$\displaystyle R_L $$). Diode $$\displaystyle D_2 $$ provides discharge path.

  • Operation: When $$\displaystyle V_{in} > V_{cap} $$, $$\displaystyle D_1 $$ forward-biased, capacitor charges to peak. When $$\displaystyle V_{in} < V_{cap} $$, $$\displaystyle D_1 $$ reverse-biased, capacitor holds peak via $$\displaystyle D_2 $$ (slow discharge through $$\displaystyle R_L $$).

  • Need for Buffer: Prevents capacitor discharge through load.

7.7 Sample and Hold (S/H):

  • Circuit: Voltage follower (op-amp) with switch (FET) and hold capacitor.

  • Modes:

    • Sample: Switch closed, capacitor charges to $$\displaystyle V_{in} $$.

    • Hold: Switch open, capacitor holds voltage.

  • Application: Analog-to-Digital Converters (ADCs). Input must be stable during conversion.


8.0 555 TIMER IC

8.1 Internal Block Diagram & Pins:

  • Pin 1 (GND)

  • Pin 2 (Trigger): Negative trigger (< 1/3 Vcc) sets output high.

  • Pin 3 (Output): Push-pull output.

  • Pin 4 (Reset): Active low. Forces output low when < 0.7V.

  • Pin 5 (Control Voltage): Access to internal voltage divider (2/3 Vcc). External voltage changes thresholds.

  • Pin 6 (Threshold): Positive trigger (> 2/3 Vcc) resets output low.

  • Pin 7 (Discharge): Open-collector output to discharge timing capacitor.

  • Pin 8 (Vcc)

8.2 Astable Multivibrator (Oscillator):

  • Circuit: $$\displaystyle R_A $$, $$\displaystyle R_B $$, $C$ connected between pins 7, 6, 2, and GND.

  • Working: Capacitor $C$ charges via $$\displaystyle R_A+R_B $$ to 2/3 Vcc (threshold) → output low, discharge pin on. $C$ discharges via $$\displaystyle R_B $$ to 1/3 Vcc (trigger) → output high, discharge pin off. Cycle repeats.

  • Time Periods:

    • $$\displaystyle T_{high} = 0.693 (R_A + R_B) C $$

    • $$\displaystyle T_{low} = 0.693 R_B C $$

    • Total Period: $$\displaystyle T = T_{high} + T_{low} = 0.693 (R_A + 2R_B) C $$

    • Frequency: $$\displaystyle f = \frac{1}{T} = \frac{1.44}{(R_A + 2R_B)C} $$

    • Duty Cycle: $$\displaystyle D = \frac{T_{high}}{T} = \frac{R_A + R_B}{R_A + 2R_B} $$ (>50% always).

8.3 Monostable Multivibrator (One-Shot):

  • Circuit: $R$, $C$ connected between pins 7 and 6. Trigger pulse applied to pin 2 (negative-going).

  • Working: Trigger makes output high. $C$ charges via $R$ to 2/3 Vcc. When threshold reached, output goes low, $C$ discharges via pin 7.

  • Pulse Width: \boxed{T = 1.1 RC}

  • Note: Output remains high as long as trigger is low, but width determined by $RC$.

8.4 Schmitt Trigger using 555:

  • Circuit: Use Threshold (Pin 6) and Trigger (Pin 2) pins as inputs. Connect them together. Output at Pin 3.

  • Operation: Hysteresis due to internal voltage divider.

    • Upper Threshold (UTP): $$\displaystyle V_{UTP} = \frac{2}{3} V_{cc} $$

    • Lower Threshold (LTP): $$\displaystyle V_{LTP} = \frac{1}{3} V_{cc} $$

  • Application: Waveform shaping (sine to square), noise immunity.


9.0 VOLTAGE REGULATORS

9.1 Need: Provide stable, constant DC voltage despite changes in AC line voltage or load current.

9.2 Classification:

  • Linear Regulators: Series (pass transistor in series) or Shunt (parallel Zener). Simple, low noise, inefficient (high power dissipation).

  • Switching Regulators: Step-down (Buck), Step-up (Boost), Inverting. Efficient, noisy, complex.

9.3 Fixed Voltage Regulators (78xx/79xx):

  • 78xx: Positive output (e.g., 7805 → +5V).

  • 79xx: Negative output (e.g., 7905 → -5V).

  • Features: Internal current limiting, thermal shutdown. Need input at least 2V higher than output.

9.4 Adjustable Voltage Regulators:

  • LM317 (Positive):

    • Pins: 1=Adj, 2=Output, 3=Input.

    • Output Voltage Formula: \boxed{V_{out} = 1.25V \left(1 + \frac{R_2}{R_1}\right) + I_{adj} R_2}

      • $$\displaystyle I_{adj} $$ (~50µA) often negligible. $$\displaystyle V_{ref} = 1.25V $$.
    • Range: 1.25V to ~37V.

    • Features: Current limiting, thermal shutdown, adjustable with two resistors.

  • LM337 (Negative): Similar, for negative outputs.

  • Advantage over Fixed: Single device provides any voltage within range → flexibility, less inventory.

9.5 Characteristics of Linear Regulators:

  • Line Regulation: $$\displaystyle \frac{\Delta V_{out}}{\Delta V_{in}} $$ (%/V or mV/V). Measures sensitivity to input voltage change.

  • Load Regulation: $$\displaystyle \frac{\Delta V_{out}}{\Delta I_{load}} $$ (mV/mA or %/A). Measures sensitivity to load current change.

  • Ripple Rejection (PSRR): Ability to reject AC ripple on input.


10.0 SPECIALIZED CIRCUITS & ADDITIONAL TOPICS

10.1 Voltage Controlled Oscillator (VCO):

  • Principle: Oscillation frequency $$\displaystyle f_0 $$ is a function of input control voltage $$\displaystyle V_{ctrl} $$.

  • Application: Phase-Locked Loops (PLLs), Frequency Modulation (FM) generation.

10.2 Clipper and Clamper Circuits:

  • Clippers: "Clip" or remove part of input waveform.

    • Series Clipper: Diode in series with load.

    • Shunt Clipper: Diode in parallel with load (reverse or forward biased).

    • Transfer Characteristic: Piecewise linear, with a "knee" at diode forward voltage (~0.7V).

  • Clampers: Add a DC level to the AC signal (shift entire waveform up/down).

    • Positive Peak Clamper: Clamps negative peak to 0V (output shifted up).

    • Negative Peak Clamper: Clamps positive peak to 0V (output shifted down).

    • Operation: Uses diode + capacitor. Capacitor charges to peak input during one half-cycle and acts as a battery during the other.

10.3 Dual Power Supply:

  • Need: Op-amps often require symmetrical supplies (e.g., ±15V) for AC-coupled signals.

  • Generation Methods:

    • Two Separate Supplies: Most straightforward.

    • Virtual Ground: Create a "midpoint" at half the single supply voltage using a voltage divider + buffer. Not a true dual supply (output swing limited).

    • Charge Pump IC (e.g., ICL7660): Switched-capacitor inverter to generate negative rail from positive.

10.4 Effect of Input Offset Parameters on Accuracy:

  • Output Offset Voltage ($$\displaystyle V_{oo} $$): Combined effect of $$\displaystyle V_{io} $$, $$\displaystyle I_B $$, $$\displaystyle I_{io} $$ and external resistors.

  • Inverting Amplifier: $$\displaystyle V_{oo} \approx -V_{io} \left(1 + \frac{R_f}{R_1}\right) - I_{B-} R_f + I_{B+} R_1 $$ (if $$\displaystyle R_1 \parallel R_f $$ used to balance $$\displaystyle I_B $$).

  • Non-inverting Amplifier: $$\displaystyle V_{oo} \approx V_{io} \left(1 + \frac{R_f}{R_1}\right) + I_{B-} R_f $$ (if $$\displaystyle R_1 \parallel R_f $$ used).

  • Minimization Techniques:

    • Use offset null pins (741).

    • Add balancing resistor $$\displaystyle R_1 \parallel R_f $$ in inverting config to balance input bias current effects.

    • Choose low $$\displaystyle I_B $$ op-amps (FET-input).

    • Precise resistor matching.

[!TIP] COMMON PITFALL: Forgetting to add the balancing resistor $$\displaystyle R_{bal} = R_1 \parallel R_f $$ in inverting amplifier configurations to cancel $$\displaystyle I_B $$-induced offset. Always check this in numerical problems.


SYLLABUS ALIGNMENT: All sections above strictly follow the APPROVED OUTLINE BLUEPRINT and prioritize topics highlighted in the HISTORICAL EXAM CONTEXT (past 5 papers). Key formulas and definitions are boxed for quick recall.

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