UNIT 3: ANALOG CIRCUITS - EXAM-FOCUSED SHORT NOTES

I. FEEDBACK AMPLIFIERS & OSCILLATORS

A. Feedback Concepts

• Feedback: Portion of output signal fed back to input.

  • Negative Feedback: Feedback signal opposes input. Stabilizes gain, reduces distortion, increases bandwidth, modifies input/output impedance.

  • Positive Feedback: Feedback signal aids input. Used in oscillators; can lead to instability.

• Barkhausen Criterion for Oscillation:

  1. Magnitude Condition: $$\displaystyle |A\beta| = 1 $$ (Loop gain magnitude = 1)

  2. Phase Condition: $$\displaystyle \angle A\beta = 0^\circ $$ or $$\displaystyle 360^\circ n $$ (Total phase shift = 0°)

  [!TIP] Both conditions must be satisfied simultaneously for sustained oscillations. $A$ = open-loop gain, $\beta$ = feedback factor.

• Effect of Negative Feedback:

  | Parameter | Effect of Negative Feedback | Formula (approx.) | | :--- | :--- | :--- | | Voltage Gain | Decreases | $$\displaystyle A_{vf} = \frac{A}{1+A\beta} $$ | | Bandwidth | Increases | $$\displaystyle BW_f = BW (1+A\beta) $$ | | Distortion | Reduces | $$\displaystyle \text{Distortion}_f \approx \frac{\text{Distortion}}{1+A\beta} $$ | | Gain Stability | Improves | $$\displaystyle \frac{\Delta A_f}{A_f} \approx \frac{1}{1+A\beta} \frac{\Delta A}{A} $$ | | Input Impedance | Increases (Series mixing) | $$\displaystyle Z_{if} = Z_i (1+A\beta) $$ | | Output Impedance | Decreases (Voltage sampling) | $$\displaystyle Z_{of} = \frac{Z_o}{1+A\beta} $$ |

B. Feedback Topologies

C. Oscillators

RC Oscillators

• RC Phase Shift Oscillator:

  • Circuit: 3 identical RC sections (or 4 for better stability) in feedback network.

  • Operation: Each RC section provides ~60° phase shift (3 sections → 180°). Amplifier inverts (180°). Total = 360°.

  • Frequency of Oscillation (for 3-section, equal R & C):

$$\boxed{f_0 = \frac{1}{2\pi RC\sqrt{6}}}$$

*   **Design**: Choose $$\displaystyle f_0 $$, select $C$, calculate $R$.

• Wien Bridge Oscillator:

  • Circuit: Series-parallel RC network (Wien bridge) in positive feedback path. Negative feedback sets gain.

  • Frequency of Oscillation:

$$\boxed{f_0 = \frac{1}{2\pi RC}}$$

*   **Advantages**: Low distortion, good frequency stability, simple.

*   **Limitations**: **Amplitude instability**; requires **Automatic Gain Control (AGC)** (e.g., thermistor, lamp, diodes) to maintain $$\displaystyle |A\beta|=1 $$.

> [!TIP] Wien Bridge is a **lead-lag** network. At $$\displaystyle f_0 $$, phase shift = 0° and attenuation = 1/3. So amplifier gain must be $$\displaystyle A_v \geq 3 $$ for oscillation.

LC Oscillators

• Generalized Analysis: Use Barkhausen with reactive impedance ratio.

  • For any LC oscillator, $$\displaystyle f_0 = \frac{1}{2\pi\sqrt{L_{eq}C_{eq}}} $$.

• Hartley Oscillator:

  • Circuit: Inductor tap (L1, L2) and capacitor C in tank circuit. Feedback from inductor tap.

  • Frequency:

$$\boxed{f_0 = \frac{1}{2\pi\sqrt{(L_1+L_2+2M)C}}} \quad \text{(M = mutual inductance)}$$

    For uncoupled coils ($$\displaystyle M=0 $$): $$\displaystyle f_0 = \frac{1}{2\pi\sqrt{(L_1+L_2)C}} $$.

• Colpitt's Oscillator:

  • Circuit: Capacitor tap (C1, C2) and inductor L in tank circuit. Feedback from capacitor junction.

  • Frequency:

$$\boxed{f_0 = \frac{1}{2\pi\sqrt{L \frac{C_1 C_2}{C_1+C_2}}}}$$

II. DIFFERENTIAL AMPLIFIERS

A. Basic Configurations

1. Dual-Input Balanced Output:

   • Structure: Two inputs ($$\displaystyle V_{in1}, V_{in2} $$), two collectors (balanced), emitter resistor $$\displaystyle R_E $$ (often unbypassed).

   • Operation: Differential Mode ($$\displaystyle V_{id} = V_{in1} - V_{in2} $$): Currents change opposite, outputs $$\displaystyle 180^\circ $$ out of phase. Common Mode ($$\displaystyle V_{ic} = \frac{V_{in1}+V_{in2}}{2} $$): Currents change same, outputs in phase (ideally zero).

2. Single-Input Configurations:

   • Balanced Output: One input grounded. Output taken from both collectors (differential).

   • Unbalanced Output: Output taken from one collector (single-ended).

3. Dual-Input Unbalanced Output: Both inputs active, output from one collector.

B. Performance Parameters

• Differential Mode Voltage Gain ($$\displaystyle A_d $$):

$$A_d = \frac{v_{od}}{v_{id}} = -g_m R_C \quad \text{(for dual-input bal. output, $$\displaystyle R_C $$ = collector load)}$$

For single-ended output: $$\displaystyle A_d = -\frac{1}{2} g_m R_C $$ (half).

• Common Mode Voltage Gain ($$\displaystyle A_c $$):

$$A_c = \frac{v_{oc}}{v_{ic}} \approx -\frac{R_C}{2R_E + r_e'} \quad \text{(if $$\displaystyle R_E $$ unbypassed, $$\displaystyle r_e' $$ = emitter resistance)}$$

$$\displaystyle A_c $$ is **small** (ideally zero).

• Common Mode Rejection Ratio (CMRR):

$$\boxed{\text{CMRR} = \left| \frac{A_d}{A_c} \right|}$$

*   **Significance**: Measures ability to reject common-mode signals (noise, DC offset). **Higher CMRR is better**.

*   In **dB**: $$\displaystyle \text{CMRR}_{\text{dB}} = 20 \log_{10} |A_d/A_c| $$.

• Derivation of $$\displaystyle A_c $$: For common-mode input, both transistors' emitters move together. $$\displaystyle R_E $$ provides negative feedback, reducing gain. $$\displaystyle A_c \approx -R_C / (2R_E) $$ if $$\displaystyle r_e' \ll R_E $$.

III. OPERATIONAL AMPLIFIERS (OP-AMPS)

A. Ideal vs. Practical (741)

B. Key Parameters & Effects

• Input Offset Voltage ($$\displaystyle V_{io} $$): Voltage required at input to make output zero. Caused by transistor mismatches. Effect: Adds error to output. Reduction: Offset null pins (external potentiometer).

• Input Bias Current ($$\displaystyle I_B $$) & Offset Current ($$\displaystyle I_{io} $$):

  • $$\displaystyle I_B = \frac{I_{B1} + I_{B2}}{2} $$ (average current into inputs).

  • $$\displaystyle I_{io} = |I_{B1} - I_{B2}| $$ (difference).

  • Effect: Voltage drop across source resistances creates offset. Compensation: Add equal resistance in series to non-inverting input.

• Output Offset Voltage:

$$\boxed{V_{out(off)} = V_{io} \left(1 + \frac{R_f}{R_{in}}\right) + I_{io} R_f \quad \text{(in inverting config)}}$$

• Slew Rate (SR):

$$\boxed{\text{SR} = \left. \frac{dV_{out}}{dt} \right|_{\text{max}}}$$

*   **Cause**: Limited current available to charge internal compensation capacitor.

*   **Effect**: Limits maximum rate of output change. For large signals, $$\displaystyle f_{\text{max}} \approx \frac{\text{SR}}{2\pi V_{\text{peak}}} $$.

• Gain-Bandwidth Product (GBP):

$$\boxed{\text{GBP} = A_{OL} \times f_{\text{unity}}}$$

*   **Significance**: Constant for a given op-amp. $$\displaystyle A_v \times f_{\text{BW}} = \text{GBP} $$. If gain is halved, bandwidth doubles.

• CMRR & PSRR: Rejection of common-mode signals and power supply noise, respectively. High values essential for precision.

C. 741 IC Pin Configuration (DIP-8)

        +Vcc (Pin 7)

          |

    +-----|-----+

    |     |     |

Pin2(-) |  | OUT (Pin 6)

    |     |     |

Pin3(+) |  | -Vcc (Pin 4)

    |     |     |

    +-----|-----+

          |

      Offset Null (Pin 1 & 5)

          |

         GND (Pin 2? Wait, 741: Pin 2=In-, Pin3=In+, Pin6=Out, Pin7=+, Pin4=-, Pin1&5=Offset Null, Pin8=NC)

Correct Pinout (Top View):

1. Offset Null (adjust)

2. Inverting Input (-)

3. Non-Inverting Input (+)

4. -Vcc (Negative Supply)

5. Offset Null (adjust)

6. Output

7. +Vcc (Positive Supply)

8. NC (No Connect)

[!TIP] Remember: 1,5 = Offset Null; 2(-), 3(+), 6(Out); 4(-V), 7(+V); 8=NC.

IV. OP-AMP APPLICATIONS I: SIGNAL CONDITIONING & WAVEFORM GENERATION

A. Linear Configurations

B. Specialized Linear Circuits

• Summing Amplifier:

  • Inverting: Multiple $$\displaystyle R_{in} $$ from inputs to (-). $$\displaystyle V_{out} = -R_f \left( \frac{V_1}{R_1} + \frac{V_2}{R_2} + ... \right) $$.

  • Non-Inverting: Weighted sum using resistors at (+) input.

• Integrator:

  • Circuit: Inverting amp with $$\displaystyle R_{in} $$ and feedback capacitor $$\displaystyle C_f $$ (instead of $$\displaystyle R_f $$).

  • Ideal Output: $$\displaystyle V_{out} = -\frac{1}{R_{in}C_f} \int V_{in} dt $$.

  • Practical: Add large $$\displaystyle R_f $$ in parallel with $$\displaystyle C_f $$ to prevent DC saturation & limit low-freq gain.

  • Applications: Ramp generation, analog computing (solving differential equations).

• Differentiator:

  • Circuit: Inverting amp with $$\displaystyle C_f $$ in feedback and $$\displaystyle R_{in} $$ at input.

  • Ideal Output: $$\displaystyle V_{out} = -R_{in}C_f \frac{dV_{in}}{dt} $$.

  • Practical: Add $$\displaystyle R_f $$ in series with $$\displaystyle C_f $$ to limit high-frequency gain & reduce noise.

  • Limitations: Amplifies high-frequency noise.

• Instrumentation Amplifier:

  • Block Diagram: Two input buffers (high $$\displaystyle Z_{in} $$) → differential amp.

  • Need: Very high CMRR, high input impedance, adjustable gain.

  • Output (for 3-op-amp IA with gain $G$ in 1st stage):

$$V_{out} = \left(1 + \frac{2R_2}{R_1}\right) \frac{R_4}{R_3} (V_2 - V_1) \quad \text{(if $$\displaystyle R_1,R_2 $$ in 1st stage, $$\displaystyle R_3,R_4 $$ in diff amp)}$$

    Simplified: $$\displaystyle V_{out} = G (V_2 - V_1) $$, where $$\displaystyle G = 1 + \frac{2R_2}{R_1} $$ (if $$\displaystyle R_3=R_4 $$).

C. Active Filters

• Magnitude Response: Plot of |$$\displaystyle A_v $$| vs. frequency.

  • Passband: Frequencies passed with little attenuation.

  • Stopband: Frequencies attenuated.

  • Cutoff Frequency ($$\displaystyle f_c $$): Frequency at which gain drops to $0.707$ ($-3$ dB) of max.

• Butterworth Filter: Maximally flat magnitude in passband (no ripple).

• 1st Order Filters (Single RC pole):

  • Low Pass Filter (LPF):

    • Circuit:

      DiagramCANVAS: Op-amp non-inverting with $$\displaystyle R_f $$ and $C$ in feedback? Actually 1st order active LPF: RC network at non-inverting input or inverting with $$\displaystyle C_f $$? Standard: Inverting config with $$\displaystyle R_{in} $$ and $$\displaystyle C_f $$ gives LPF? No: Inverting with $$\displaystyle R_{in} $$ and $$\displaystyle C_f $$ is differentiator. Correct 1st order active LPF: Use non-inverting with feedback $$\displaystyle R_f \parallel C $$? Simpler: Sallen-Key is 2nd order. For 1st order: Use op-amp to buffer RC low-pass. **Circuit**: $$\displaystyle V_{in} $$ → $R$ → $C$ to GND, op-amp buffer (voltage follower) across $C$.

    • Gain: $$\displaystyle A_v = \frac{1}{1 + jf/f_c} $$ (for passive), active version has gain $K$.

    • Cutoff: $$\displaystyle \boxed{f_c = \frac{1}{2\pi RC}} $$

  • High Pass Filter (HPF):

    • Circuit: $C$ in series, $R$ to GND, buffered.

    • Gain: $$\displaystyle A_v = \frac{jf/f_c}{1 + jf/f_c} $$.

• 2nd Order Filters: Sallen-Key Topology (most common). Uses two capacitors and two resistors in feedback network. Provides 12 dB/octave roll-off. Design equations for Butterworth response.

V. OP-AMP APPLICATIONS II: COMPARATORS & WAVEFORM GENERATORS

A. Comparators

• Zero Crossing Detector:

  • Circuit: Op-amp without feedback. $$\displaystyle V_{in} $$ to (+) or (-), reference (0V) to other input.

  • Operation: Output saturates to $$\displaystyle +V_{sat} $$ or $$\displaystyle -V_{sat} $$ depending on sign of $$\displaystyle V_{in} $$. Detects when signal crosses zero.

  • Limitation: Sensitive to noise (hysteresis needed).

• Schmitt Trigger (Comparator with Positive Feedback):

  • Circuit: Op-amp with resistor network from output to (+) input (positive feedback).

  • Operation: Two threshold voltages:

    • Upper Threshold ($$\displaystyle V_{UT} $$): When $$\displaystyle V_{out}=+V_{sat} $$, $$\displaystyle V_{in} $$ must drop below $$\displaystyle V_{LT} $$ to switch.

    • Lower Threshold ($$\displaystyle V_{LT} $$): When $$\displaystyle V_{out}=-V_{sat} $$, $$\displaystyle V_{in} $$ must rise above $$\displaystyle V_{UT} $$ to switch.

  • Hysteresis Width: $$\displaystyle V_{UT} - V_{LT} = \frac{2R_1}{R_1+R_2} V_{sat} $$ (for symmetric supplies).

  • Applications: Noise immunity, square wave generation, debouncing.

B. 555 Timer IC

• Block Diagram & Pins:

  
  1. GND (0V)
  
  2. TRIGGER (TR) - Start timing when < 1/3 Vcc
  
  3. OUTPUT
  
  4. RESET (RST) - Active low, stops timing
  
  5. CONTROL VOLTAGE (CV) - Modifies thresholds (usually 0.01μF to GND)
  
  6. THRESHOLD (TH) - End timing when > 2/3 Vcc
  
  7. DISCHARGE (DIS) - Open collector to discharge timing capacitor
  
  8. Vcc (+ve supply, 4.5-16V)
  
  

• Astable Multivibrator (Free-running oscillator):

  • Circuit:

    DiagramCANVAS: 555 with R1 from Vcc to DIS, R2 from DIS to TH & TR (connected together), C from TH/TR to GND. OUT is output.

  • Operation: Capacitor charges through $$\displaystyle R_1+R_2 $$ (via DIS), discharges through $$\displaystyle R_2 $$ only (via DIS).

  • Frequency & Duty Cycle:

$$T_{charge} = 0.693 (R_1+R_2) C$$

$$T_{discharge} = 0.693 R_2 C$$

$$\boxed{f = \frac{1.44}{(R_1+2R_2)C}}$$

$$\text{Duty Cycle (\%)} = \frac{T_{high}}{T} \times 100 = \frac{R_1+R_2}{R_1+2R_2} \times 100$$

    > [!TIP] Duty cycle **always > 50%** in basic astable. To get <50%, add diode across $$\displaystyle R_2 $$.

• Monostable Multivibrator (One-shot):

  • Circuit: Trigger pin (2) to negative pulse via $$\displaystyle C_{trigger} $$. $R$ and $C$ from DIS to Vcc.

  • Operation: Low trigger pulse makes output high for time $T$, then returns low.

  • Pulse Width:

$$\boxed{T = 1.1 R C}$$

• Schmitt Trigger using 555:

  • Circuit: Connect TH (6) and TR (2) together as input. DIS (7) open. Output (3) is Schmitt trigger output.

  • Operation: Uses internal voltage divider (2/3 Vcc, 1/3 Vcc). Hysteresis = 1/3 Vcc.

VI. VOLTAGE REGULATORS & POWER SUPPLIES

A. Basic Concepts

• Need for Regulation: Maintain constant $$\displaystyle V_{out} $$ despite changes in line voltage (input) or load current.

• Line Regulation: $$\displaystyle \frac{\Delta V_{out}}{\Delta V_{in}} \times 100\% $$ (should be low).

• Load Regulation: $$\displaystyle \frac{\Delta V_{out}}{\Delta I_{load}} \times 100\% $$ (should be low).

• Fixed vs. Adjustable:

  | Feature | Fixed Regulator (e.g., 7805) | Adjustable Regulator (e.g., LM317) | | :--- | :--- | :--- | | Output | Fixed (5V, 12V, etc.) | Variable ($1.25V$ to $$\displaystyle V_{in}-2V $$) | | Flexibility | Low | High | | External Components | Minimal (I/P, O/P caps) | Requires $$\displaystyle R_1, R_2 $$ to set $$\displaystyle V_{out} $$ | | Applications | Standard digital logic, fixed loads | Custom supplies, battery chargers |

B. Linear Regulators

• Series Regulator (Pass Transistor):

  • Circuit: Pass transistor (BJT/MOSFET) in series with load. Error amp compares $$\displaystyle V_{ref} $$ with $$\displaystyle V_{out} $$ (via divider) to control pass transistor.

  • Operation: If $$\displaystyle V_{out} $$ drops, error amp increases pass transistor conduction → $$\displaystyle V_{out} $$ rises.

• Shunt Regulator:

  • Circuit: Zener diode (or reference) in parallel (shunt) with load. Series resistor from $$\displaystyle V_{in} $$.

  • Operation: Zener maintains constant voltage across load. Inefficient (current through Zener even at no load).

• LM317 Adjustable Regulator:

  • Pins: 1=Adjust, 2=Output, 3=Input.

  • Circuit:

    DiagramCANVAS: $$\displaystyle V_{in} $$ to Pin3, Pin2 to $$\displaystyle V_{out} $$, Pin1 to $$\displaystyle R_1 $$ (120Ω) to $$\displaystyle V_{out} $$, $$\displaystyle R_2 $$ from $$\displaystyle V_{out} $$ to Pin1. Adj pin current $$\displaystyle I_{adj} \approx 50\mu A $$.

  • Output Voltage Formula:

$$\boxed{V_{out} = 1.25V \left(1 + \frac{R_2}{R_1}\right) + I_{adj} R_2}$$

    $$\displaystyle I_{adj} $$ often negligible. $$\displaystyle R_1 $$ typically 120Ω–240Ω.

*   **Features**: Adjustable 1.25V–37V, current limiting, thermal shutdown.

C. Switching Regulators (Brief)

• Principle: Switch pass transistor ON/OFF rapidly (high frequency). Use inductor/capacitor to filter. High efficiency (>80%) as transistor operates in saturation/cutoff (low power loss).

• Types:

  • Step-down (Buck): $$\displaystyle V_{out} < V_{in} $$.

  • Step-up (Boost): $$\displaystyle V_{out} > V_{in} $$.

  • Inverting: $$\displaystyle V_{out} $$ opposite polarity to $$\displaystyle V_{in} $$.

• Advantages over Linear: High efficiency, no heat sink needed for moderate power.

• Limitations: Electromagnetic interference (EMI), complex, output ripple.

VII. OTHER ANALOG IC APPLICATIONS & CONSIDERATIONS

A. Signal Processing Circuits

• Peak Detector:

  • Circuit: Op-amp with diode in feedback path, capacitor holds peak.

    DiagramCANVAS: $$\displaystyle V_{in} $$ to (+) of op-amp. (-) connected to capacitor (to GND) via diode (anode to cap, cathode to op-amp output).

  • Operation: When $$\displaystyle V_{in} > V_{cap} $$, diode conducts, capacitor charges to peak. When $$\displaystyle V_{in} < V_{cap} $$, diode reverse-biased, capacitor holds peak (discharges slowly via load or bleed resistor).

  • Applications: Envelope detection, peak measurement.

• Sample and Hold (S/H):

  • Block Diagram: Analog switch (controlled by logic) → Hold capacitor → Buffer.

  • Operation:

    • Sample Mode: Switch ON, capacitor charges to $$\displaystyle V_{in} $$.

    • Hold Mode: Switch OFF, capacitor holds voltage constant.

  • Applications: ADC interface (convert analog to digital), multiplexed data acquisition.

B. Integrated Circuits (ICs)

• Definition: Miniaturized circuit with interconnected components (transistors, resistors, etc.) fabricated on single semiconductor substrate.

• Classification: Analog/Digital, Linear/Digital (Linear: op-amps, regulators; Digital: logic gates, microcontrollers).

• Characteristics:

  • Miniaturization, low cost, high reliability, high speed, low power.

  • Limitations: Limited power handling, thermal sensitivity, fabrication complexity, testing difficulty.

• Advantages over Discrete: Size, cost, performance consistency, reliability.

• Basic Building Components:

  • Transistors: Main active devices (BJT, MOSFET).

  • Resistors: Diffused or thin-film (large area for high resistance).

  • Capacitors: MOS capacitors (metal-oxide-semiconductor), junction capacitors (small value).

  • Interconnects: Metal layers (Al, Cu) for wiring.

C. Data Sheets

• Importance: Essential for selecting, designing with, and troubleshooting ICs. Provides absolute maximum ratings and guaranteed performance under specified conditions.

• Typical Information:

  1. Absolute Maximum Ratings: Limits beyond which damage occurs (voltage, current, temperature).

  2. Electrical Characteristics: DC/AC parameters ($$\displaystyle V_{io} $$, $$\displaystyle I_B $$, SR, GBP, etc.) at specific $T$, $$\displaystyle V_{cc} $$.

  3. Timing Diagrams: Input/output waveforms, propagation delays.

  4. Pin Configuration/Diagram: Physical layout and function of each pin.

  5. Package Information: Dimensions, thermal characteristics.

  6. Typical Application Circuits: Example circuits to guide design.

VIII. SPECIAL TOPICS & SHORT NOTES

Clipper and Clamper Circuits

• Clipper: Limits peak of waveform. Uses diode + resistor (sometimes bias). Removes portion above/below reference.

  • Types: Positive clipper, negative clipper, biased clipper.

• Clamper: Shifts entire waveform by adding DC level. Uses diode, capacitor, resistor. Does not change shape, only vertical position.

  • Types: Positive clamper (shifts up), negative clamper (shifts down).

Voltage-Controlled Oscillator (VCO)

• Principle: Output frequency controlled by input DC voltage.

• Circuit: Often uses varactor diode (capacitance varies with reverse bias voltage) in LC tank or integrator-based (e.g., 555 with control voltage on pin 5).

• Applications: PLLs, frequency modulation (FM), function generators.

Dual Power Supply

• Need: Op-amps often require symmetrical supplies ($$\displaystyle \pm V_{cc} $$) for AC coupling (output swing both positive/negative).

• Implementation:

  1. Two separate regulators (e.g., 7812 & 7912 for $\pm12V$).

  2. Virtual Ground: Single supply ($$\displaystyle +V_{cc} $$) with rail splitter (e.g., TLE2426) to create mid-point ($$\displaystyle V_{cc}/2 $$) as reference.

• Effect on Op-Amp: Single supply limits output swing (cannot go to ground or $$\displaystyle V_{cc} $$ closely). Dual supply allows full symmetrical swing.

Effect of Power Supply Variation on Op-Amp

• PSRR (Power Supply Rejection Ratio): Measures how well op-amp rejects supply fluctuations.

$$\text{PSRR} = \frac{\Delta V_{in}}{\Delta V_{supply}} \quad \text{(for same output change)}$$

• Effect: Low PSRR → supply ripple appears at output. Can cause noise, offset drift. Use bypass capacitors (0.1μF close to supply pins) to reduce high-frequency ripple.

Comparison of Multivibrators

[!TIP] 555 in Astable = Free-running oscillator. 555 in Monostable = One-shot timer. Schmitt Trigger (with or without 555) = Comparator with hysteresis.