UNIT 2: ANALOG CIRCUITS - EXAM-FOCUSED SHORT NOTES

I. FEEDBACK IN AMPLIFIERS

A. Fundamental Concepts & Classification

• Feedback: A portion of the output signal is fed back to the input.

  • Block Diagram:
    DiagramCANVAS: Amplifier block with forward gain A and feedback factor β, summing point at input

• Positive Feedback: Feedback signal is in-phase with the input.

  • Effect: Increases gain, used in oscillators. Can lead to instability.

  • Waveform: Distorts, increases amplitude until saturation.

• Negative Feedback: Feedback signal is 180° out-of-phase with the input.

  • Effect: Reduces overall gain but improves performance (see advantages below).

  • Waveform: Cleaner, more linear.

• Barkhausen Criterion for Oscillation:

  1. Loop gain magnitude must be unity ($$\displaystyle |Aβ| = 1 $$).

  2. Phase shift around the loop must be 0° or 360° ($$\displaystyle \angle Aβ = 0° $$).

  [!TIP] Exam Focus: This criterion is the MOST IMPORTANT condition for sustained oscillations. It is asked in almost every paper.

B. Negative Feedback in Amplifiers

• Implementation: Sampling output (voltage/current) and mixing with input (series/shunt).

• Advantages (High Priority):

  • Gain Stabilization: Closed-loop gain $$\displaystyle A_f = \frac{A}{1+Aβ} $$ becomes less sensitive to changes in open-loop gain $A$.

  • Bandwidth Extension: Gain-Bandwidth Product (GBP) is constant. $$\displaystyle GBP = A_{OL} \times f_{BW(OL)} = A_{CL} \times f_{BW(CL)} $$. Reducing gain increases bandwidth.

  • Reduced Distortion: Non-linear distortions are reduced by factor $(1+Aβ)$.

  • Improved Input Impedance:

    • Voltage-series (Series-Shunt): $$\displaystyle Z_{in(CL)} \approx Z_{in(OL)}(1+Aβ) $$ (Increases).

    • Voltage-shunt (Shunt-Shunt): $$\displaystyle Z_{in(CL)} \approx \frac{Z_{in(OL)}}{1+Aβ} $$ (Decreases).

  • Reduced Output Impedance:

    • Voltage-sampling (Voltage-series, Voltage-shunt): $$\displaystyle Z_{out(CL)} \approx \frac{Z_{out(OL)}}{1+Aβ} $$ (Decreases).

    • Current-sampling (Current-series, Current-shunt): $$\displaystyle Z_{out(CL)} \approx Z_{out(OL)}(1+Aβ) $$ (Increases).

  • Stability & Reduced Sensitivity: Circuit performance becomes more dependent on feedback network (stable resistors) than on active device parameters.

• Disadvantages:

  • Reduced overall voltage gain.

  • Risk of instability (oscillation) if not properly compensated.

  • Bandwidth increase is at the cost of gain.

C. Feedback Topologies

[!TIP] Mnemonic: First word = Input connection (Series/Shunt). Second word = Output sampling (Voltage/Current).

II. OSCILLATORS

A. General Oscillator Theory

• Definition: A circuit that generates a periodic waveform without any input signal.

• Condition for Start-up: $$\displaystyle |Aβ| > 1 $$ (Loop gain > 1).

• Condition for Sustained Oscillation: $$\displaystyle |Aβ| = 1 $$ and $$\displaystyle \angle Aβ = 0° $$ (Barkhausen Criterion).

• Frequency of Oscillation ($$\displaystyle f_o $$): Determined by the frequency-selective network (RC or LC).

B. RC Oscillators (For Low Frequencies: Hz to ~1 MHz)

1. RC Phase Shift Oscillator (High Priority)

• Circuit: Uses three identical RC sections in cascade (each provides 60° shift at $$\displaystyle f_o $$) + an inverting amplifier (180° shift).

  DiagramCANVAS: Op-amp inverting config with feedback network: R-C-R-C-R-C ladder from output to inverting input

• Working: Total phase shift = 180° (amp) + 180° (network) = 360° at $$\displaystyle f_o $$.

• Frequency of Oscillation:

$$f_o = \frac{1}{2\pi RC\sqrt{6}} \quad \boxed{\text{for 3 RC sections}}$$

*   **Numerical Tip:** Given $R$ and $C$, plug directly. If given $$\displaystyle f_o $$, rearrange: $$\displaystyle RC = \frac{1}{2\pi f_o \sqrt{6}} $$.

• Advantages: Simple, good for audio frequencies.

• Disadvantages: Poor frequency stability, low output impedance, requires high amplifier gain ($$\displaystyle A_{VL} \geq 29 $$).

2. Wien Bridge Oscillator (Very High Priority)

• Circuit: Uses a Wien Bridge (series RC || parallel RC) as frequency-selective positive feedback network.

  DiagramCANVAS: Non-inverting op-amp. Feedback network: Series R-C from output to +ve input, parallel R-C from +ve input to ground. Gain set by R1, Rf from output to -ve input.

• Working: At $$\displaystyle f_o $$, network phase shift = 0°, attenuation = 1/3. For sustained oscillation, amplifier gain $$\displaystyle A = 1 + \frac{R_f}{R_1} = 3 $$.

• Frequency of Oscillation:

$$f_o = \frac{1}{2\pi RC} \quad \boxed{}$$

• Advantages: Excellent frequency stability, low distortion, simple.

• Limitations: Gain must be precisely 3. Requires amplitude stabilization (e.g., using thermistor, diodes, FET in R_f path) to prevent distortion/clipping.

C. LC Oscillators (For High Frequencies: > 1 MHz)

• Generalized Analysis: Use a tank circuit (L and C in parallel) for frequency selection. Condition: $$\displaystyle X_L = X_C $$ at $$\displaystyle f_o $$. $$\displaystyle f_o = \frac{1}{2\pi\sqrt{LC}} $$.

• Hartley Oscillator:

  • Feedback: Inductive voltage divider (two series inductors or tapped coil).

  • DiagramCANVAS: Common emitter amplifier. Tank circuit: L1 (in series with) L2 (tapped) || C. Feedback from L1-L2 junction to base via coupling cap.

• Colpitt's Oscillator:

  • Feedback: Capacitive voltage divider (two capacitors in series across L).

  • DiagramCANVAS: Common emitter amplifier. Tank circuit: L || (C1 series C2). Feedback from C1-C2 junction to base via coupling cap.

• Comparison (RC vs LC):

  | Feature | RC Oscillator | LC Oscillator | | :--- | :--- | :--- | | Frequency Range | Low (Hz - 1 MHz) | High (> 1 MHz) | | Stability | Poorer | Better | | Size/Weight | Smaller (no L) | Larger (bulky L) | | Phase Shift | 180° from RC network | 0° from LC tank (parallel) |

III. OPERATIONAL AMPLIFIER (OP-AMP) FUNDAMENTALS

A. Ideal vs. Practical Op-Amp

• Ideal Op-Amp Characteristics:

  • $$\displaystyle A_{OL} \rightarrow \infty $$, $$\displaystyle Z_{in} \rightarrow \infty $$, $$\displaystyle Z_{out} \rightarrow 0 $$.

  • Bandwidth $$\displaystyle \rightarrow \infty $$, CMRR $$\displaystyle \rightarrow \infty $$, PSRR $$\displaystyle \rightarrow \infty $$.

  • $$\displaystyle V_{io} = 0 $$, $$\displaystyle I_{b} = 0 $$, $$\displaystyle I_{io} = 0 $$, Slew Rate $$\displaystyle \rightarrow \infty $$.

• Practical Op-Amp (e.g., 741):

  • Finite $$\displaystyle A_{OL} $$ (~200,000), finite $$\displaystyle Z_{in} $$ (~2 MΩ), non-zero $$\displaystyle Z_{out} $$ (~75 Ω).

  • Limited bandwidth, CMRR ~90 dB, PSRR ~90 dB.

  • Non-zero $$\displaystyle V_{io} $$ (~1-5 mV), $$\displaystyle I_b $$ (~80 nA), $$\displaystyle I_{io} $$ (~20 nA), SR ~0.5 V/µs.

• Equivalent Circuit Model:

  DiagramCANVAS: Input: differential voltage source (Vd) with series resistors (input impedance). Output: voltage-controlled voltage source (A*Vd) with series output impedance.

B. Op-Amp Parameters & Specifications (High Priority)

• Input Offset Voltage ($$\displaystyle V_{io} $$):

  • Definition: Voltage required at input to make output zero. Caused by transistor mismatches.

  • Effect: Output error = $$\displaystyle A_{OL} \times V_{io} $$. Can be nulled with external pot.

• Input Bias Current ($$\displaystyle I_b $$) & Input Offset Current ($$\displaystyle I_{io} $$):

  • $$\displaystyle I_b = \frac{I_{b+} + I_{b-}}{2} $$, $$\displaystyle I_{io} = |I_{b+} - I_{b-}| $$.

  • Effect: Creates output offset due to voltage drop across input resistors.

  • Offset Voltage due to $$\displaystyle I_b $$:

$$V_{out(offset)} = I_b \times R_{eq} \times A_{CL} \quad \text{where } R_{eq} = R_1 || R_f \text{ (for inverting)}$$

    > [!TIP] **Common Exam Problem:** Given $$\displaystyle I_b $$, $$\displaystyle R_f $$, $$\displaystyle R_1 $$, calculate $$\displaystyle V_{out(offset)} $$. **Remember to use $$\displaystyle R_{eq} $$ for inverting config.**

• Common-Mode Rejection Ratio (CMRR):

  • Definition: Ratio of differential mode gain to common-mode gain.

$$CMRR = \frac{A_d}{A_{cm}} \quad \text{(unitless, often in dB: } 20\log_{10}(CMRR)\text{)}$$

*   **Significance:** Measures ability to reject noise/ interference common to both inputs. **High CMRR is critical for instrumentation.**

• Slew Rate (SR):

  • Definition: Maximum rate of change of output voltage ($$\displaystyle \frac{dV_o}{dt} $$). Units: V/µs.

  • Effect: Limits maximum output frequency for large signals. $$\displaystyle f_{max} = \frac{SR}{2\pi V_{o(peak)}} $$.

  • Example: 741 SR = 0.5 V/µs. For 10 Vpp sine wave, $$\displaystyle f_{max} \approx 8 $$ kHz.

• Power Supply Rejection Ratio (PSRR): Measures change in output due to change in supply voltage. High PSRR is good.

• Gain-Bandwidth Product (GBP): Constant for a given op-amp. $$\displaystyle GBP = A_{OL} \times f_{BW} $$. For 741, GBP ~ 1 MHz.

C. IC 741 Op-Amp

• Pin Configuration (8-pin DIP):

  DiagramCANVAS: Standard 741 pinout diagram with numbers 1-8.

  1. Offset Null

  2. Inverting Input (-)

  3. Non-inverting Input (+)

  4. V- (Negative Supply)

  5. Offset Null

  6. Output

  7. V+ (Positive Supply)

  8. NC (No Connection)

• Internal Block Diagram (Simplified): Input stage (differential amp) -> Intermediate gain stage -> Output stage (push-pull) -> Bias circuitry.

IV. DIFFERENTIAL AMPLIFIER

A. Basic Configurations (High Priority)

• Dual-Input Balanced Output: Both inputs active, outputs taken from both collectors (differential output). Rejects common-mode.

• Dual-Input Unbalanced Output: Both inputs active, output taken from one collector. Most common.

• Single-Input Balanced Output: One input grounded, output differential. Used as buffer.

• Single-Input Unbalanced Output: One input grounded, output single-ended. Basic building block.

B. Analysis & Characteristics

• Differential Mode Gain ($$\displaystyle A_d $$): $$\displaystyle A_d = \frac{V_{od}}{V_d} = \frac{V_{o1} - V_{o2}}{(V_{i1} - V_{i2})} $$.

• Common Mode Gain ($$\displaystyle A_{cm} $$): $$\displaystyle A_{cm} = \frac{V_{oc}}{V_c} = \frac{(V_{o1} + V_{o2})/2}{(V_{i1} + V_{i2})/2} $$.

• CMRR: $$\displaystyle CMRR = \frac{A_d}{A_{cm}} $$. For perfect symmetry, $$\displaystyle A_{cm} = 0 $$, CMRR = ∞.

• Output Voltage Calculation (Dual-Input Unbalanced, $$\displaystyle R_1 = R_2 = R $$, $$\displaystyle R_f = R_e $$):

$$V_{out} = \frac{R_f}{R_1} (V_2 - V_1) \quad \boxed{}$$

*   **Exam Problem:** Given resistor values and $$\displaystyle V_1, V_2 $$, compute $$\displaystyle V_{out} $$. Use formula above.

• Derivation of $$\displaystyle A_{cm} $$ (for unbalanced output):

$$A_{cm} \approx -\frac{R_f}{2R_e + 2R} \quad \text{(if emitter resistance } R_e \text{ is large, } A_{cm} \rightarrow 0)$$

C. Advantages & Applications

• Advantages: Rejects common-mode noise/thermal drift, amplifies difference. Essential for DC amplification.

• Applications: Input stage of every op-amp, instrumentation amplifiers, strain gauges, ECG.

V. OP-AMP APPLICATIONS – LINEAR CIRCUITS

A. Inverting Amplifier

• Circuit:

  DiagramCANVAS: Input Vin to R1 to inverting terminal. Feedback Rf from output to inverting. Non-inverting to ground.

• Voltage Gain:

$$A_v = \frac{V_{out}}{V_{in}} = -\frac{R_f}{R_1} \quad \boxed{}$$

• Characteristics: Virtual ground at inverting input. $$\displaystyle Z_{in} \approx R_1 $$.

B. Non-Inverting Amplifier

• Circuit:

  DiagramCANVAS: Vin to non-inverting input. Inverting input connected to R1 to ground and Rf to output.

• Voltage Gain:

$$A_v = 1 + \frac{R_f}{R_1} \quad \boxed{}$$

• Characteristics: Very high $$\displaystyle Z_{in} $$. No virtual ground.

C. Voltage Follower (Unity Gain Buffer)

• Circuit: $$\displaystyle R_f = 0 $$, $$\displaystyle R_1 = \infty $$ (or direct connection).

• Gain: $$\displaystyle A_v = 1 $$.

• Application: Impedance buffering (high $$\displaystyle Z_{in} $$, low $$\displaystyle Z_{out} $$).

D. Summing & Difference Amplifiers

• Inverting Summing Amp: $$\displaystyle V_{out} = -R_f \left( \frac{V_1}{R_1} + \frac{V_2}{R_2} + ... \right) $$.

• Difference Amp (Subtractor): $$\displaystyle V_{out} = \frac{R_f}{R_1}(V_2 - V_1) $$ (if $$\displaystyle R_1=R_2 $$, $$\displaystyle R_f=R_3 $$).

E. Integrator & Differentiator (Very High Priority)

F. Active Filters (High Priority)

• First-Order Butterworth Low-Pass Filter (LPF):

  • Circuit:

    DiagramCANVAS: Non-inverting amp with gain. Feedback: Rf || Cf from output to -. Input: R from Vin to -.
    (or multiple feedback topology).

  • Transfer Function:

$$A_v(s) = \frac{A_0}{1 + sRC} \quad \text{where } A_0 = 1 + \frac{R_f}{R_1}$$

*   **Cut-off Frequency:** 

$$f_c = \frac{1}{2\pi RC} \quad \boxed{}$$

*   **Magnitude Response:** Flat passband ($$\displaystyle |A_v|=A_0 $$), -20 dB/decade roll-off after $$\displaystyle f_c $$.

• First-Order Butterworth High-Pass Filter (HPF):

  • Circuit: Swap R and C positions in LPF.

  • Cut-off Frequency: Same $$\displaystyle f_c = \frac{1}{2\pi RC} $$.

  • Magnitude Response: -20 dB/decade roll-off below $$\displaystyle f_c $$, flat above.

• Comparison:

  | Filter | Passband | Stopband | Roll-off | | :--- | :--- | :--- | :--- | | LPF | $$\displaystyle 0 \to f_c $$ | $$\displaystyle > f_c $$ | -20 dB/dec | | HPF | $$\displaystyle > f_c $$ | $$\displaystyle 0 \to f_c $$ | -20 dB/dec | | BPF | $$\displaystyle f_{c1} \to f_{c2} $$ | Outside | ±40 dB/dec (2nd order) | | BSF | Outside | $$\displaystyle f_{c1} \to f_{c2} $$ | ±40 dB/dec |

G. Instrumentation Amplifier

• Need: High CMRR, high $$\displaystyle Z_{in} $$, gain set by single resistor. Better than single diff-amp.

• Three-Op-Amp Configuration:

  DiagramCANVAS: Two input buffers (op-amps 1 & 2) with gain resistors. Their outputs feed a differential amp (op-amp 3).

• Output Voltage:

$$V_{out} = \left(1 + \frac{2R_f}{R_{gain}}\right) \frac{R_f}{R_1} (V_2 - V_1)$$

*   Gain set by **$$\displaystyle R_{gain} $$ only**. $$\displaystyle R_1 $$, $$\displaystyle R_f $$ matched.

VI. 555 TIMER IC

A. Internal Block Diagram & Pin Configuration (High Priority)

• Functional Blocks: Voltage Divider (3x 5kΩ), Two Comparators, SR Flip-Flop, Discharge Transistor.

  DiagramCANVAS: Internal block diagram showing resistors, comparators, flip-flop, discharge pin.

• Pin Diagram (8-pin DIP):

  DiagramCANVAS: Standard 555 pinout.

  1. GND (0V)

  2. TRIGGER (Start for monostable, < 1/3 Vcc for astable)

  3. OUTPUT

  4. RESET (Active low, stops operation)

  5. CONTROL VOLTAGE (Modulate threshold, usually 0.01 µF to GND)

  6. THRESHOLD (Stop for monostable, > 2/3 Vcc for astable)

  7. DISCHARGE (Open collector to ground)

  8. Vcc (+5V to +15V)

B. Astable Multivibrator (Very High Priority)

• Circuit:

  DiagramCANVAS: 555 with R1 from Vcc to discharge (7), R2 from discharge to threshold (6) & trigger (2). C from threshold/trigger junction to GND.

• Working: Capacitor C charges through R1+R2 to 2/3 Vcc (threshold), discharges through R2 to 1/3 Vcc (trigger). Output toggles continuously.

• Time Period & Frequency:

$$T_{charge} = 0.693(R_1 + R_2)C$$

$$T_{discharge} = 0.693 R_2 C$$

$$T = T_{charge} + T_{discharge} = 0.693(R_1 + 2R_2)C$$

$$f = \frac{1}{T} = \frac{1.44}{(R_1 + 2R_2)C} \quad \boxed{}$$

• Duty Cycle:

$$D = \frac{T_{high}}{T} = \frac{R_1 + R_2}{R_1 + 2R_2} \quad \boxed{}$$

*   **Note:** Duty cycle **always > 50%** in standard astable config. For 50%, use diode across R2.

C. Monostable Multivibrator

• Circuit: Trigger pin (2) gets negative pulse.

  DiagramCANVAS: 555 with R from Vcc to discharge (7), C from discharge to GND. Trigger from external source to pin 2 via differentiator.

• Working: One stable state (output low). Trigger makes output high for time $T$, then returns low.

• Output Pulse Width:

$$T = 1.1 RC \quad \boxed{}$$

D. Bistable Multivibrator (Schmitt Trigger)

• Configuration: Use 555 without capacitor. Pins 2 & 6 connected together as input. Threshold and trigger levels are 2/3 Vcc and 1/3 Vcc.

• Operation: Output toggles when input crosses these thresholds. Hysteresis width = (2/3 - 1/3)Vcc = 1/3 Vcc.

VII. VOLTAGE REGULATORS

A. Types of Regulators

• Fixed Regulators (78xx/79xx): Simple, low cost. e.g., 7805 (+5V), 7905 (-5V). Need capacitors for stability.

• Adjustable Regulators (LM317/LM337):

  • Features: Output 1.25V to 37V (or -1.25V to -37V). Current limiting, thermal shutdown.

  • Advantages over Fixed: Variable output, higher current (~1.5A), better tolerance.

• Linear vs. Switching:

  | Linear Regulator | Switching Regulator | | :--- | :--- | | Low noise, simple, inefficient (heat sink). | High efficiency (>80%), complex, noisy. | | Works only for $$\displaystyle V_{in} > V_{out} + dropout $$. | Can step-up (boost), step-down (buck), invert. |

B. LM317 Voltage Regulator (High Priority)

• Pinout (TO-220):

  DiagramCANVAS: LM317 pinout: 1=Adj, 2=Output, 3=Input.

• Adjustable Output Circuit:

  DiagramCANVAS: LM317 with R1 (120-240Ω) from output to adj. R2 from adj to ground. Caps on I/P & O/P.

• Output Voltage Formula:

$$V_{out} = 1.25V + 1.25V \times \frac{R_2}{R_1} \quad \boxed{}$$

*   **Note:** 1.25V is reference voltage between output and adj. $$\displaystyle I_{adj} $$ (~50 µA) usually neglected.

• Protection Features: Current limiting, thermal shutdown, safe operating area.

VIII. SPECIAL FUNCTION CIRCUITS & OTHER IC ASPECTS

A. Integrated Circuits (ICs)

• Definition: Miniaturized circuit with all components fabricated on a single semiconductor chip.

• Classification: Analog (op-amps, regulators), Digital (logic gates, microcontrollers), Mixed-signal (ADC, DAC).

• Characteristics: Miniaturization, high reliability, low cost, high speed, low power.

• Advantages over Discrete: Size, cost, performance, reliability, power consumption.

• Disadvantages: High initial cost, design complexity, limited power handling, testing difficulty.

• Basic Building Components: Transistors (BJT, MOSFET), Diodes, Resistors (diffused), Capacitors (parasitic), Interconnects (metal layers).

B. Data Sheets (High Priority)

• Importance: THE authoritative source for IC specifications, ratings, and application guidance.

• Typical Information Provided:

  1. Absolute Maximum Ratings: Supply voltage, power dissipation, temperature.

  2. Electrical Characteristics: $$\displaystyle V_{io} $$, $$\displaystyle I_b $$, $$\displaystyle I_{io} $$, CMRR, SR, GBP, etc. (at specific $T$, $$\displaystyle V_{cc} $$).

  3. Timing Diagrams & Waveforms: Critical for digital/logic ICs.

  4. Pin Configuration/Diagram: Essential for correct connection.

  5. Typical Application Circuits: Recommended designs.

  6. Package Information: Dimensions, thermal characteristics.

C. Additional Application Circuits

• Peak Detector:

  DiagramCANVAS: Diode from Vin to capacitor (hold). Op-amp buffer to drive capacitor.
  Captures peak, holds until reset.

• Sample and Hold:

  DiagramCANVAS: Analog switch (FET) between Vin and hold capacitor. Op-amp buffer. Control logic.
  Samples input when switch ON, holds when OFF. Crucial for ADCs.

• Zero Crossing Detector: Simple comparator (op-amp) with Vin to +, GND to -. Output switches when Vin crosses 0V.

• Voltage-Controlled Oscillator (VCO): Oscillator frequency controlled by input voltage (e.g., 555 with control voltage on pin 5).

• Dual Power Supply: For op-amp circuits needing ±Vcc. Simple split-rail using two batteries or virtual ground (Vcc/2) with buffers.

D. Clipper and Clamper Circuits

• Clipper: Removes portion of signal above/below a reference.

  • Types: Positive/Negative, Biased (with DC source).

  • DiagramCANVAS: Diode in series/parallel with load, with DC bias.

• Clamper: Shifts entire signal up/down by a DC level.

  • Types: Positive/Negative clamper.

  • DiagramCANVAS: Diode, capacitor, load in parallel.
    Capacitor charges to peak, then acts as bias.

[!TIP] Final Exam Strategy: For 7-mark questions, always start with definition/block diagram, then explain working principle, followed by key equations/characteristics, and end with advantages/disadvantages/applications. For numericals, show formula, substitution, and boxed answer.