CS-404 Computer Organization & Architecture - Jun 2023 Question Paper

Under each question, How to answer lists the points an answer should cover, outlined by CampusPrep from the syllabus. Check the details against your textbook.

1. Marks
   aExplain basic principles of computer architecture.
   How to answer

   • Define computer architecture as design of processor and its organization
   • Explain instruction set architecture (ISA)
   • Discuss control and datapath design
   • Mention memory hierarchy and I/O organization
   • Explain abstraction levels from gates to high-level programs
2. Marks
   bWhat is Multiprocessing? Discuss types of data transfer in detail.
   How to answer

   • Define multiprocessing as using multiple processors to execute programs
   • Discuss tightly-coupled and loosely-coupled systems
   • Explain synchronous vs asynchronous data transfer
   • Describe serial, parallel, and network data transfer modes
   • Compare performance characteristics
3. Marks
   aExplain the following terms: i) Stack organization ii) Bus structure and addressing modes iii) Fetch and execution cycle
   How to answer

   • Stack: LIFO memory structure with push/pop operations for subroutine calls
   • Bus: set of parallel lines for data, address, control with different addressing modes (direct, indirect, indexed, etc.)
   • Fetch-Execute: instruction fetch from memory, decode, execute sequence with timing
4. Marks
   aWrite Booths algorithm. Also explain floating point arithmetic operation.
   How to answer

   • Booths algorithm: technique for multiplying signed binary numbers using addition and subtraction
   • Scan multiplier bits from right to left, process transitions from 0 to 1 and 1 to 0
   • Floating point: sign bit, exponent, mantissa representation
   • IEEE 754 standard and arithmetic operations (add, subtract, multiply, divide)
5. Marks
   bDescribe signal addition and subtraction in detail.
   How to answer

   • Signal addition: combining two signals by adding corresponding sample values
   • Signal subtraction: subtracting one signal from another
   • Convolution and correlation concepts
   • Digital signal processing applications
6. Marks
   aElaborate following with examples: i) Serial and parallel data transfer ii) Synchronous and asynchronous modes of data transfer
   How to answer

   • Serial: one bit at a time on single wire (RS-232, UART)
   • Parallel: multiple bits simultaneously on multiple wires (parallel port)
   • Synchronous: clock signal controls timing (SPI, I2C)
   • Asynchronous: no clock, uses start/stop bits (UART, RS-232)
   • Tradeoffs: speed vs complexity
7. Marks
   bWrite notes on following: i) Direct memory access ii) PCI Bus and SCSI Bus
   How to answer

   • DMA: bypass CPU for direct data transfer between memory and peripherals
   • Uses DMA controller for address, control, and synchronization
   • PCI: Peripheral Component Interconnect bus standard for internal connections
   • SCSI: Small Computer System Interface for external peripherals (printers, storage)
8. Marks
   aCompare following i) Main memory and secondary memory ii) Cache memory and Virtual memory
   How to answer

   • Main memory: fast, volatile, limited capacity (RAM)
   • Secondary memory: slow, non-volatile, large capacity (disk, SSD)
   • Cache: very fast but small, holds frequently used data
   • Virtual memory: extends main memory using disk space
   • Compare speed, capacity, cost, and volatility
9. Marks
   bDescribe replacement algorithm and write steps to improve cache performance.
   How to answer

   • Replacement algorithms: LRU (Least Recently Used), FIFO, LFU, optimal
   • LRU: replace block used longest time ago
   • Improve performance: increase cache size, reduce block size, improve locality
   • Write policies: write-through vs write-back
   • Prefetching and cache coherence strategies
10. Marks
    aExplain characteristics and structure of multiprocessor.
    How to answer

    • Multiprocessor: system with multiple CPUs sharing or distributed memory
    • Shared memory multiprocessor: uniform or non-uniform memory access (UMA/NUMA)
    • Distributed memory: message passing systems
    • Characteristics: scalability, interconnect topology, cache coherence
    • Tightly-coupled vs loosely-coupled systems
11. Marks
    bWhat is concept of pipelining? Differentiate vector processing and array processing.
    How to answer

    • Pipelining: overlap execution of multiple instructions for improved throughput
    • Stages: fetch, decode, execute, memory, write-back
    • Vector processing: operates on vectors of data in parallel
    • Array processing: parallel processing on arrays of processors
    • Compare SIMD, MIMD architectures
12. Marks
    aDescribe following in brief i) LRU algorithm ii) Tools compliment representation iii) Memory management hardware
    How to answer

    • LRU: cache replacement policy removing least recently accessed block
    • Two's complement: binary representation of negative numbers using MSB as sign
    • Memory management hardware: MMU (Memory Management Unit) for virtual-to-physical address translation
    • TLB for fast address lookup, page tables
13. Marks
    bWhat is inter-processor communication and synchronization? Also describe inter-processor arbitration.
    How to answer

    • Inter-processor communication: sharing data/messages between processors
    • Shared memory communication: through common memory locations
    • Message passing: explicit send/receive operations
    • Synchronization: ensure correct ordering using semaphores, barriers, locks
    • Arbitration: resolve conflicts when multiple processors access shared resources
14. Marks
    aDiscuss multicore processor in detail.
    How to answer

    • Multicore: multiple independent processors (cores) on single chip
    • Shared resources: L3 cache, memory controller, interconnect
    • Per-core: L1 instruction and data caches, L2 cache
    • Power efficiency and parallel execution
    • Challenges: thermal management, thread synchronization, load balancing
15. Marks
    bWrite short notes on following: i) Semiconductor memories ii) Hardwired control unit iii) RISC and CISC iv) Micro instruction formats
    How to answer

    • Semiconductor memories: RAM (volatile), ROM (non-volatile), SRAM, DRAM, Flash
    • Hardwired control: fixed logic circuits generating control signals vs microprogram control
    • RISC: Reduced Instruction Set Computer - simple instructions, load-store architecture
    • CISC: Complex Instruction Set Computer - complex instructions, memory operations
    • Micro instruction formats: fixed-field vs variable-length, specify control signals