Skip to content
CS-404 · Computer Org. & Architecture/Unsolved PYQ Paper

CS-404 Computer Org. & Architecture - Jun 2026 Question Paper

Under each question, How to answer lists the points an answer should cover, outlined by CampusPrep from the syllabus. Check the details against your textbook.

  1. 7 Marks
    aExplain Stack based central processing unit organization with block diagram.
    How to answer
    • Define stack-based CPU organization and 0-address instructions
    • Describe stack pointer, PUSH/POP operation and LIFO
    • Explain ALU interaction with top of stack
    • Provide block diagram with memory stack, SP, ALU, control
  2. 7 Marks
    bWhat is the Difference between hardwired and micro programmed control unit. Explain each component of hardwired control unit organization.
    How to answer
    • Define hardwired control and microprogrammed control
    • Tabulate differences: speed, flexibility, cost, implementation
    • Describe hardwired components: instruction register, decoder, sequencer, control logic gates
    • Explain generation of control signals
  3. 7 Marks
    aWAP to evaluate arithmetic expression using stack organized computer with 0-address instruction. $X= (A-B)*(((C-D*E)/F)/G)$
    How to answer
    • Convert $X=(A-B)*(((C-D*E)/F)/G)$ to postfix for stack
    • List 0-address instructions PUSH, SUB, MUL, DIV
    • Show step-wise stack contents
    • Write complete program sequence
  4. 7 Marks
    bEvaluate $(-13)*(8)$ using Booth's Multiplication algorithm and draw the flow diagram of this process.
    How to answer
    • Represent -13 and 8 in binary with sign handling
    • Apply Booth's recoding steps with A, Q, Q-1 and arithmetic shift
    • Show cycle-wise table to get -104
    • Draw flowchart of Booth's multiplication algorithm
  5. 7 Marks
    aExplain the concept of instruction pipelining and describe different stages of instruction pipelining and their functions.
    How to answer
    • Define instruction pipelining and overlap of fetch-decode-execute
    • List stages: IF, ID, OF, EX, WB
    • Explain function of each stage
    • Mention speedup and hazards briefly
  6. 7 Marks
    bExplain the concept of vector processing and its advantages over scalar processing.
    How to answer
    • Define vector processing vs scalar processing
    • Explain SIMD and vector instructions, pipelined ALU
    • List advantages: speed, throughput, efficiency for arrays
    • Give example applications
  7. 7 Marks
    aExplain the architecture of Intel multicore processors with suitable diagrams.
    How to answer
    • Describe multicore concept: multiple cores on single chip
    • Explain shared cache, interconnect, memory controller
    • Provide suitable block diagram of Intel multicore
    • Mention advantages: parallelism, performance
  8. 7 Marks
    bDescribe the working principle of the PCI Bus. How does it improve communication between peripherals and the processor?
    How to answer
    • Define PCI bus and its features
    • Explain bus arbitration, data transfer and plug-and-play
    • Explain bridge between processor and peripherals
    • Show how speed and efficiency improve
  9. 7 Marks
    aDraw the flow chart of Restoring division operation and perform the division process of 10100 by 101 using non-restoring Booth's division method.
    How to answer
    • Draw flowchart of restoring division algorithm
    • Explain non-restoring steps: subtract, shift, add if negative
    • Perform $10100$ divided by $101$ step-wise
    • Obtain quotient and remainder
  10. 7 Marks
    bWhat is meant by cache mapping? Discuss different mapping techniques with examples.
    How to answer
    • Define cache mapping and need for placement
    • Explain direct, associative and set-associative with example
    • Show address field division and hit/miss logic
    • Compare advantages and disadvantages
  11. 7 Marks
    aExplain the architecture and working of the SCSI Bus with a suitable diagram.
    How to answer
    • Define SCSI bus and its devices
    • Explain architecture: initiator, target, daisy chain
    • Describe working: arbitration, selection, data transfer phases
    • Provide suitable diagram
  12. 7 Marks
    bCalculate the page fault for a given string with the help of LRU, FIFO and Optimal page replacement algorithm, size of frames = 4 and string 12342156212376321236.
    How to answer
    • State reference string and 4 frames
    • Simulate FIFO, count faults step-wise
    • Simulate LRU and Optimal replacement
    • Compare total page faults for three algorithms
  13. 7 Marks
    aExplain the concept of Asynchronous data transfer with methods.
    How to answer
    • Define asynchronous transfer and need for handshaking
    • Explain strobe control method
    • Explain handshaking method with source/destination initiated
    • Mention applications
  14. 7 Marks
    bWrite short notes on any **two** of the following :
    1. i)Auxiliary Memory
    2. ii)Virtual memory
    3. iii)ROM
    How to answer
    • Select any two from auxiliary, virtual, ROM
    • Define each with characteristics and purpose
    • Explain organization and examples
    • Mention advantages/limitations
  15. 7 Marks
    aDiscuss the significance and importance of DMA and elaborate the working of DMA Controller.
    How to answer
    • Define DMA and need to offload CPU
    • Explain DMA controller registers and signals: BR, BG, address
    • Describe transfer modes: burst, cycle stealing
    • Explain working sequence with block diagram
  16. 7 Marks
    bDifferentiate between the following :
    1. i)RISC & CISC
    2. ii)Horizontal & Vertical micro-programmed control unit
    How to answer
    • Define RISC vs CISC with features and examples
    • Compare on instruction size, addressing, pipelining, compiler
    • Define horizontal vs vertical microprogrammed control
    • Compare on control word width, decoding, speed, storage
Go to where you left off?

Quick Add to Notes

Save questions, your own notes and screenshots into notes filed by unit. It takes a free account.

Create free account

Have an account? Log in