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EX-305 · Analog Electronics/Quick Revision Short Notes

Analog Electronics (EX-305) - Unit 4 Short Notes

UNIT 4: Analog Electronics - Short Notes

1. Semiconductor Diodes

1.1 P-N Junction Diode

  • Working Principle: Formed by joining p-type and n-type semiconductors. Creates a depletion region with an internal electric field. Under forward bias, the field narrows, allowing majority carrier injection and current flow. Under reverse bias, the field widens, blocking current (except small reverse saturation current $$\displaystyle I_S $$).

  • V-I Characteristics:

    • Forward Bias: Exponential increase in current after ~0.7V (Si) or 0.3V (Ge). $$\displaystyle I = I_S (e^{V/(nV_T)} - 1) $$.

    • Reverse Bias: Small constant $$\displaystyle I_S $$ until breakdown voltage $$\displaystyle V_{BR} $$.

  • Applications: Rectification, switching, protection (freewheeling diode), voltage regulation (Zener).

  • Transient Response: When forward-biased diode with series resistance $R$ has voltage instantly reversed to $$\displaystyle V_R $$ at $$\displaystyle t=0 $$, initial reverse current is $$\displaystyle I_R(0) = -\left(\frac{V_F + V_R}{R}\right) $$, decaying with time constant $$\displaystyle \tau = \frac{L}{R} $$ (if inductance present) or $$\displaystyle \tau = R C_j $$ (junction capacitance).

[!TIP] Exam often asks reverse current calculation: treat diode as current source $$\displaystyle I_F $$ in parallel with junction capacitance $$\displaystyle C_j $$ at $$\displaystyle t=0 $$.

1.2 Rectifiers and Power Supplies

  • Half-Wave Rectifier:

    • Circuit: Single diode in series with load $$\displaystyle R_L $$.

    • Output: $$\displaystyle V_{DC} = \frac{V_m}{\pi} $$, $$\displaystyle I_{DC} = \frac{V_m}{\pi R_L} $$.

    • Efficiency $$\displaystyle \eta = \frac{P_{DC}}{P_{AC}} = 40.6\% $$ (max).

  • Full-Wave Rectifiers:

    • Center-Tapped: Two diodes, center-tapped transformer. $$\displaystyle V_{DC} = \frac{2V_m}{\pi} $$.

    • Bridge: Four diodes. $$\displaystyle V_{DC} = \frac{2V_m}{\pi} $$ (no center tap needed).

  • Rectification Efficiency:

    • Full-wave: $$\displaystyle \eta_{max} = \frac{2V_m/\pi}{(V_m^2/R_L)/(2)} = \frac{4}{\pi^2} \approx 81.2\% $$.

    • \boxed{\eta_{max} = \frac{4}{\pi^2} \approx 81.2%}

  • Ripple Factor ($r$): Measure of AC content in DC output. $$\displaystyle r = \frac{V_{rms(ac)}}{V_{DC}} $$.

    • Capacitor Filter: $$\displaystyle r \approx \frac{1}{2\sqrt{3} f R_L C} $$ (full-wave, $f$ = ripple freq = 2f_line).

    • Choke Input (L-type): $$\displaystyle r \approx \frac{R_L}{\omega L} $$ (better at high load current).

  • Voltage Multipliers: Use capacitor-diode stages.

    • Half-wave doubler: $$\displaystyle V_{out} \approx 2V_m $$.

    • Full-wave doubler (Greinacher): Lower ripple.

    • Applications: CRTs, photomultipliers, high-voltage DC supplies.

1.3 Special Diodes

  • Zener Diode:

    • Breakdown: Zener (E < 5V, tunneling) or avalanche (E > 7V). Operates in reverse breakdown region.

    • V-I: Sharp breakdown at $$\displaystyle V_Z $$. Used for voltage regulation.

    • Regulator Circuit: $$\displaystyle V_{out} = V_Z $$, $$\displaystyle R \geq \frac{V_{in(min)} - V_Z}{I_{Z(min)} + I_{L(max)}} $$.

  • Tunnel Diode:

    • Negative Resistance Region: Due to quantum tunneling. Peak current $$\displaystyle I_P $$, valley current $$\displaystyle I_V $$, peak voltage $$\displaystyle V_P $$.

    • Applications: High-speed switching, oscillators.

  • Schottky Diode:

    • Metal-Semiconductor junction. Low forward voltage ($$\displaystyle V_F \approx 0.2-0.3V $$), fast switching (no minority carrier storage).

    • Applications: RF mixers, high-speed digital circuits, clamping.

  • Varactor Diode:

    • Voltage-controlled capacitance. $$\displaystyle C \propto (V_{bi} - V_R)^{-n} $$.

    • Applications: VCOs, frequency modulation, tunable filters.

  • LED:

    • Light Emission: Recombination of electrons/holes in direct bandgap material (GaAsP, GaN). Requires current limiting resistor.

    • Characteristics: Higher $$\displaystyle V_F $$ (1.8-3.3V), slower than Si diodes.

1.4 Diode Waveform Shaping Circuits

  • Clippers: Remove part of input signal.

    • Series Clipper: Diode in series with load. Clips positive or negative half.

    • Shunt Clipper: Diode in parallel with load (biased with $$\displaystyle V_{ref} $$). Can clip at two levels.

    • Double-Ended Clipper: Two diodes (opposing) clip both positive and negative peaks. Equal amplitudes: symmetric supply; unequal: different $$\displaystyle V_{ref} $$.

  • Clampers: Shift entire waveform to a DC level.

    • Clamping Theorem: Output swings symmetrically around $$\displaystyle V_{ref} $$ if capacitor is large. $$\displaystyle V_{out(max)} - V_{out(min)} = V_{in(max)} - V_{in(min)} $$.

    • Positive Clamper: Shifts signal upward. $$\displaystyle V_{out} \approx V_{in} + V_{peak} $$ (for ideal diode, large C).

    • Biased Clamper: Adds $$\displaystyle V_{ref} $$ to shift level.

    • Waveforms: During positive half, diode conducts, capacitor charges to $$\displaystyle V_{in(peak)} + V_{ref} $$. During negative half, diode off, capacitor discharges through $$\displaystyle R_L $$.

[!TIP] Clipper vs Clamper: Clipper removes portion; Clamper shifts entire waveform.


2. Bipolar Junction Transistors (BJT)

2.1 Structure and Types

  • NPN vs PNP:

    • NPN: Electrons majority carriers. Faster, more common.

    • PNP: Holes majority carriers. Higher base resistance.

    • Symbols: Arrow direction indicates emitter current (out for NPN, in for PNP).

2.2 Operating Regions

  • Cutoff: $$\displaystyle V_{BE} < 0.7V $$, $$\displaystyle I_C \approx 0 $$. Transistor OFF (switch).

  • Active: $$\displaystyle V_{BE} \approx 0.7V $$, $$\displaystyle V_{CE} > V_{BE} $$. $$\displaystyle I_C = \beta I_B $$. Used for amplification.

  • Saturation: $$\displaystyle V_{CE} \approx 0.2V $$, $$\displaystyle V_{BE} > 0.7V $$. Both junctions forward biased. Transistor ON (switch).

2.3 Transistor Configurations

Configuration Input Impedance Output Impedance Voltage Gain Current Gain Phase Reversal Applications
Common Base (CB) Low ($$\displaystyle \approx r_e $$) High High ($$\displaystyle \approx \alpha R_C/r_e $$) $\alpha \approx 1$ No High-frequency amplifiers
Common Emitter (CE) Medium ($$\displaystyle \approx \beta r_e $$) Medium High ($$\displaystyle \approx -g_m R_C $$) $\beta$ Yes General-purpose amplification
Common Collector (CC) High ($$\displaystyle \approx \beta (r_e + R_E) $$) Low $\approx 1$ $\beta + 1$ No Buffer, impedance matching

2.4 Biasing Techniques

  • Fixed Bias: $$\displaystyle I_B = \frac{V_{CC} - V_{BE}}{R_B} $$. Simple but poor stability ($$\displaystyle S = 1 + \beta $$).

  • Self-Bias (Voltage Divider Bias):

    • Circuit: $$\displaystyle R_1 $$, $$\displaystyle R_2 $$ voltage divider from $$\displaystyle V_{CC} $$ to ground. Emitter resistor $$\displaystyle R_E $$.

    • Stability: $$\displaystyle V_B \approx V_{CC} \frac{R_2}{R_1+R_2} $$ (independent of $\beta$). $$\displaystyle I_E \approx \frac{V_B - V_{BE}}{R_E} $$.

    • Design: Choose $$\displaystyle R_1 \parallel R_2 \approx 10 R_E $$ for good stability. $$\displaystyle R_E $$ provides negative feedback.

  • Emitter Bias: $$\displaystyle V_{EE} $$ negative supply. Good stability for PNP.

2.5 Transistor Parameters

  • $\alpha$ and $\beta$:

    • $$\displaystyle \alpha = \frac{I_C}{I_E} $$ (common base current gain, 0.98-0.99).

    • $$\displaystyle \beta = \frac{I_C}{I_B} $$ (common emitter current gain, 20-500).

    • Relationship: $$\displaystyle \alpha = \frac{\beta}{\beta + 1} $$, $$\displaystyle \beta = \frac{\alpha}{1 - \alpha} $$.

  • h-Parameters (Hybrid-$\pi$ for small-signal):

    • $$\displaystyle h_{ie} = \left. \frac{\Delta V_{BE}}{\Delta I_B} \right|_{V_{CE}=const} $$ (input impedance).

    • $$\displaystyle h_{fe} = \left. \frac{\Delta I_C}{\Delta I_B} \right|_{V_{CE}=const} $$ (current gain).

    • $$\displaystyle h_{re} = \left. \frac{\Delta V_{BE}}{\Delta V_{CE}} \right|_{I_B=const} $$ (reverse voltage ratio, small).

    • $$\displaystyle h_{oe} = \left. \frac{\Delta I_C}{\Delta V_{CE}} \right|_{I_B=const} $$ (output admittance).

2.6 DC and Small-Signal Analysis

  • DC Load Line: From $$\displaystyle V_{CE} = V_{CC} - I_C R_C $$. Q-point intersection of load line and transistor characteristic (set by $$\displaystyle I_B $$).

  • Stability Factor ($S$): $$\displaystyle S = \frac{1 + \beta}{1 + \beta \frac{R_B}{R_B + R_E}} $$ (for voltage divider). Lower $S$ = better stability. Design $$\displaystyle R_E $$ large enough to suppress thermal runaway.

  • Small-Signal Analysis:

    • AC Load Line: Slope $$\displaystyle = -1/R_{AC} $$, where $$\displaystyle R_{AC} = R_C \parallel R_L $$.

    • Voltage Gain (CE): $$\displaystyle A_v = -g_m R_{AC} \approx -\frac{R_{AC}}{r_e} $$, where $$\displaystyle r_e = \frac{26mV}{I_E} $$ at room temp.

    • With emitter resistor $$\displaystyle R_E $$ (bypassed $$\displaystyle C_E $$): $$\displaystyle A_v \approx -\frac{R_{AC}}{r_e} $$; if unbypassed: $$\displaystyle A_v \approx -\frac{R_{AC}}{r_e + R_E} $$.

2.7 Special BJT Circuits

  • Darlington Pair:

    • Two transistors connected: $$\displaystyle I_{B2} = I_{C1} $$, $$\displaystyle I_{E1} \approx I_{C1} $$. Total current gain $$\displaystyle \beta_{total} = \beta_1 \beta_2 $$ (very high, >10,000).

    • $$\displaystyle V_{BE(total)} \approx 2 \times 0.7V = 1.4V $$.

    • Applications: High-impedance inputs (e.g., microphone preamps, power supplies).


3. Field Effect Transistors (FET) and MOSFET

3.1 Junction Field Effect Transistor (JFET)

  • Structure: n-channel (electrons) or p-channel (holes). Gate forms reverse-biased p-n junction.

  • Working Principle:

    • Pinch-off: As $$\displaystyle V_{GS} $$ becomes more negative (n-JFET), depletion region widens, narrowing channel. At $$\displaystyle V_{GS} = V_P $$ (pinch-off voltage), channel closes.

    • Saturation (Constant Current): For $$\displaystyle V_{DS} > |V_{GS} - V_P| $$, $$\displaystyle I_D $$ constant (saturated).

  • Shockley Equation (for $$\displaystyle V_{GS} < 0 $$):

$$I_D = I_{DSS} \left(1 - \frac{V_{GS}}{V_P}\right)^2$$

where $$\displaystyle I_{DSS} $$ = drain current at $$\displaystyle V_{GS}=0 $$, $$\displaystyle V_P $$ (negative for n-JFET) = pinch-off voltage.

  • Characteristics:

    • Transfer Curve: $$\displaystyle I_D $$ vs $$\displaystyle V_{GS} $$ (parabolic in saturation).

    • Output Curve: $$\displaystyle I_D $$ vs $$\displaystyle V_{DS} $$ (ohmic region then saturation).

  • Self-Bias Design (n-JFET example):

    Given $$\displaystyle V_P $$, $$\displaystyle I_{DSS} $$, $$\displaystyle V_{DD} $$, desired $$\displaystyle I_D $$, $$\displaystyle V_{DS} $$.

    1. From Shockley: $$\displaystyle V_{GS} = V_P \left(1 - \sqrt{\frac{I_D}{I_{DSS}}}\right) $$.

    2. KVL: $$\displaystyle V_{DD} = I_D R_D + V_{DS} + I_D R_S $$.

    3. Also: $$\displaystyle V_{GS} = -I_D R_S $$.

    4. Solve for $$\displaystyle R_D $$, $$\displaystyle R_S $$.

3.2 Metal-Oxide-Semiconductor FET (MOSFET)

  • Structure: Gate insulated by SiO₂ from channel. Four terminals: Gate (G), Source (S), Drain (D), Body/Bulk (B).

  • Enhancement vs Depletion:

    • Enhancement: No channel at $$\displaystyle V_{GS}=0 $$. Apply $$\displaystyle V_{GS} > V_{th} $$ (n-MOS) or $$\displaystyle V_{GS} < V_{th} $$ (p-MOS) to induce channel.

    • Depletion: Channel exists at $$\displaystyle V_{GS}=0 $$. $$\displaystyle V_{GS} $$ depletes channel.

  • Working:

    • n-MOS Enhancement: $$\displaystyle V_{GS} > V_{th} $$ attracts electrons to surface, forms n-channel. $$\displaystyle I_D $$ increases with $$\displaystyle V_{GS} $$.

    • Triode Region ($$\displaystyle V_{DS} < V_{GS} - V_{th} $$): $$\displaystyle I_D \approx \mu_n C_{ox} \frac{W}{L} \left[(V_{GS}-V_{th})V_{DS} - \frac{V_{DS}^2}{2}\right] $$.

    • Saturation ($$\displaystyle V_{DS} \geq V_{GS} - V_{th} $$): $$\displaystyle I_D = \frac{1}{2} \mu_n C_{ox} \frac{W}{L} (V_{GS} - V_{th})^2 (1 + \lambda V_{DS}) $$.

  • Characteristics: Similar to JFET but with $$\displaystyle V_{th} $$ instead of $$\displaystyle V_P $$.

3.3 CMOS

  • Structure: Complementary pair (n-MOS and p-MOS) on same substrate.

  • Merits:

    • Very low static power (only one transistor ON in steady state).

    • High noise immunity.

    • High density – basis of modern digital ICs.

  • Operation: Inverter: n-MOS pull-down, p-MOS pull-up.


4. Amplifier Circuits

4.1 Feedback Amplifiers

  • Feedback Types:

    | Feedback Type | Voltage/Current | Series/Shunt | Effect on $$\displaystyle Z_{in} $$ | Effect on $$\displaystyle Z_{out} $$ | |---------------|-----------------|--------------|--------------------|---------------------| | Voltage-Series (Series-Shunt) | Voltage | Series | ↑ | ↓ | | Voltage-Shunt (Shunt-Shunt) | Voltage | Shunt | ↓ | ↓ | | Current-Series (Series-Series) | Current | Series | ↑ | ↑ | | Current-Shunt (Shunt-Series) | Current | Shunt | ↓ | ↑ |

  • Effects of Negative Feedback:

    • Gain Reduction: $$\displaystyle A_f = \frac{A}{1 + A\beta} $$.

    • Bandwidth Extension: Gain-bandwidth product constant. $$\displaystyle BW_f = BW (1 + A\beta) $$.

    • Noise & Distortion Reduction: By factor $(1 + A\beta)$.

    • Impedance Modification: As per table above.

    • Stability Improvement: Reduces sensitivity to component variations.

4.2 Power Amplifiers

  • Classes of Operation:

    | Class | Conduction Angle | Efficiency ($$\displaystyle \eta_{max} $$) | Distortion | Applications | |-------|------------------|--------------------------|------------|--------------| | A | 360° | 50% | Low | Audio preamps, low-power | | B | 180° | 78.5% | Crossover | Push-pull audio | | AB | 180°-360° | 50-78.5% | Low crossover | Audio power amps | | C | <180° | High (>78.5%) | High | RF amplifiers, oscillators |

  • Class A:

    • Circuit: Single transistor, bias at midpoint of load line.

    • $$\displaystyle P_{DC} = V_{CC} I_{CQ} $$, $$\displaystyle P_{O(max)} = \frac{(V_{CC}/2)^2}{2R_L} = \frac{V_{CC}^2}{8R_L} $$.

    • $$\displaystyle \eta_{max} = \frac{P_{O(max)}}{P_{DC}} = \frac{50\%} $$.

  • Class B (Push-Pull):

    • Two transistors (NPN/PNP or complementary). Each conducts 180°.

    • $$\displaystyle P_{O(max)} = \frac{V_{CC}^2}{2R_L} $$ (for $$\displaystyle V_{CE(sat)} \approx 0 $$).

    • $$\displaystyle P_{DC} = \frac{2V_{CC}}{\pi} I_{C(max)} $$.

    • $$\displaystyle \eta_{max} = \frac{\pi}{4} \approx 78.5\% $$.

    • Crossover Distortion: Near zero crossing, both transistors off. Reduced by biasing into AB class.

  • Efficiency Calculation Example:

    Given $$\displaystyle V_{CC} $$, $$\displaystyle R_L $$, $$\displaystyle V_{pp} $$ across $$\displaystyle R_L $$:

    $$\displaystyle P_O = \frac{(V_{pp}/2)^2}{R_L} = \frac{V_{pp}^2}{8R_L} $$.

    $$\displaystyle P_{DC} = V_{CC} I_{avg} $$. For sinusoidal, $$\displaystyle I_{avg} = \frac{2I_{pk}}{\pi} = \frac{2}{\pi} \frac{V_{pp}/2}{R_L} $$.

    $$\displaystyle \eta = \frac{P_O}{P_{DC}} $$.

4.3 Differential Amplifiers

  • Working Principle: Two identical transistors with common emitter resistor $$\displaystyle R_E $$ (or current source). Differential input $$\displaystyle V_{id} = V_{i1} - V_{i2} $$; Common-mode input $$\displaystyle V_{ic} = \frac{V_{i1} + V_{i2}}{2} $$.

  • Output Configurations:

    • Single-ended: Output from one collector.

    • Differential: Output between two collectors (twice single-ended).

  • CMRR (Common-Mode Rejection Ratio):

$$CMRR = \left| \frac{A_d}{A_c} \right|$$

where $$\displaystyle A_d $$ = differential gain, $$\displaystyle A_c $$ = common-mode gain.

  • In dB: $$\displaystyle CMRR_{dB} = 20 \log_{10} \left| \frac{A_d}{A_c} \right| $$.

  • Ideal: $$\displaystyle A_c = 0 $$, $$\displaystyle CMRR = \infty $$.

  • For simple diff-amp with emitter resistor $$\displaystyle R_E $$: $$\displaystyle A_d \approx -\frac{R_C}{2r_e} $$, $$\displaystyle A_c \approx -\frac{R_C}{2R_E + 2r_e} $$ (if $$\displaystyle R_E $$ large, $$\displaystyle A_c \approx 0 $$).

  • Applications: Input stage of Op-Amps, noise rejection in long-line transmission.


5. Oscillators

5.1 RC Oscillators

  • RC Phase Shift Oscillator:

    • Circuit: Three identical RC sections (each 60° shift at $$\displaystyle f_0 $$) in feedback network from collector to base. Amplifier (CE) provides 180°.

    • Frequency of Oscillation:

$$f_0 = \frac{1}{2\pi RC \sqrt{6}} \approx \frac{0.065}{RC}$$

\boxed{f_0 = \frac{1}{2\pi RC \sqrt{6}}}
  • Condition: $\beta A \geq 1$, with $$\displaystyle \beta = \left(\frac{RC j\omega}{1 + 3RC j\omega - (RC j\omega)^2}\right)^3 $$. At $$\displaystyle f_0 $$, $$\displaystyle |\beta| = \frac{1}{29} $$ → $A \geq 29$.

  • Wein Bridge Oscillator:

    • Circuit: Series-parallel RC network (lead-lag) in positive feedback path. Frequency-selective network.

    • Frequency:

$$f_0 = \frac{1}{2\pi RC}$$

\boxed{f_0 = \frac{1}{2\pi RC}}
  • Condition: $A \geq 3$ (for balanced bridge, $$\displaystyle R_f = 2R_1 $$ if $$\displaystyle R_1=R_2 $$, $$\displaystyle C_1=C_2 $$).

  • Design Example: Given $$\displaystyle f_0 $$, choose $R$ or $C$ from formula.

5.2 LC Oscillators

  • Hartley Oscillator:

    • Circuit: Tapped coil ($$\displaystyle L_1 $$, $$\displaystyle L_2 $$) or split inductor. Capacitor $C$ across whole coil. Feedback from tap.

    • Frequency:

$$f_0 = \frac{1}{2\pi \sqrt{L_{eq} C}}$$

where $$\displaystyle L_{eq} = L_1 + L_2 + 2M $$ (if coupled) or $$\displaystyle L_1 + L_2 $$ (if separate). Often $$\displaystyle L_{eq} \approx L_1 + L_2 $$.

\boxed{f_0 = \frac{1}{2\pi \sqrt{(L_1 + L_2)C}}}
  • Feedback Fraction: $$\displaystyle \beta = \frac{L_2}{L_1} $$ (for tapped coil).

  • Colpitts Oscillator:

    • Circuit: Split capacitor ($$\displaystyle C_1 $$, $$\displaystyle C_2 $$) in series with inductor $L$. Feedback from junction of capacitors.

    • Frequency:

$$f_0 = \frac{1}{2\pi \sqrt{L C_{eq}}}$$

where $$\displaystyle C_{eq} = \frac{C_1 C_2}{C_1 + C_2} $$.

\boxed{f_0 = \frac{1}{2\pi \sqrt{L \frac{C_1 C_2}{C_1 + C_2}}}}
  • Feedback Fraction: $$\displaystyle \beta = \frac{C_2}{C_1 + C_2} $$.

  • General: LC tank provides 180° phase shift at resonance (with amplifier). High frequency stability due to high Q.

5.3 Crystal Oscillator

  • Principle: Piezoelectric effect (mechanical stress → voltage, vice versa). Crystal acts as resonant RLC circuit.

  • Equivalent Circuit: Series $$\displaystyle L_m $$, $$\displaystyle C_m $$, $$\displaystyle R_m $$ (motional) in parallel with shunt $$\displaystyle C_0 $$ (static capacitance).

  • Resonances:

    • Series Resonance: $$\displaystyle f_s = \frac{1}{2\pi \sqrt{L_m C_m}} $$ (low impedance).

    • Parallel Resonance: $$\displaystyle f_p \approx f_s \left(1 + \frac{C_m}{2C_0}\right) $$ (high impedance).

  • Circuit: Pierce oscillator (common) – crystal between collector and base (inverter) with parallel capacitors.

  • Merits: Extremely high frequency stability ($$\displaystyle \Delta f/f \sim 10^{-6} $$ to $$\displaystyle 10^{-8} $$). Used in clocks, RF transmitters.


6. Operational Amplifiers (Op-Amps)

6.1 Ideal vs Practical Characteristics

  • Ideal Op-Amp:

    • $$\displaystyle A_{OL} \to \infty $$, $$\displaystyle Z_{in} \to \infty $$, $$\displaystyle Z_{out} = 0 $$.

    • Bandwidth $\to \infty$, slew rate $\to \infty$.

    • Input offset voltage/current = 0, CMRR $\to \infty$.

  • Practical Op-Amp (e.g., 741):

    • $$\displaystyle A_{OL} = 10^5 $$ (100 dB), $$\displaystyle Z_{in} \approx 2M\Omega $$, $$\displaystyle Z_{out} \approx 75\Omega $$.

    • Slew rate $\approx 0.5V/\mu s$, gain-bandwidth product $\approx 1MHz$.

    • Input bias current $\approx 80nA$, offset voltage $\approx 1mV$.

    • CMRR $\approx 90dB$.

6.2 Basic Configurations

  • Inverting Amplifier:

    • Circuit: Input via $$\displaystyle R_{in} $$ to (-) terminal, feedback $$\displaystyle R_f $$ from output to (-). (+) grounded.

    • Voltage Gain: $$\displaystyle A_v = -\frac{R_f}{R_{in}} $$ (ideal).

    • Input Impedance: $$\displaystyle Z_{in} \approx R_{in} $$ (since (-) terminal virtual ground).

  • Non-Inverting Amplifier:

    • Circuit: Input to (+) terminal. Feedback network from output to (-).

    • Voltage Gain: $$\displaystyle A_v = 1 + \frac{R_f}{R_1} $$.

    • Input Impedance: Very high ($$\displaystyle \approx Z_{in(op-amp)} $$).

  • Voltage Follower:

    • $$\displaystyle R_f = 0 $$, $$\displaystyle R_1 = \infty $$ (output connected to (-)).

    • $$\displaystyle A_v = 1 $$, $$\displaystyle Z_{in} \to \infty $$, $$\displaystyle Z_{out} \to 0 $$. Used as buffer.

6.3 Applications

  • Comparators:

    • Inverting Comparator: $$\displaystyle V_{ref} $$ to (+), input to (-). Output saturates ±$$\displaystyle V_{sat} $$.

    • Non-Inverting Comparator: $$\displaystyle V_{ref} $$ to (-), input to (+).

    • Zero Crossing Detector: $$\displaystyle V_{ref}=0 $$. Output switches when input crosses zero.

    • Schmitt Trigger (hysteresis comparator):

      • Positive feedback via $$\displaystyle R_1 $$, $$\displaystyle R_2 $$.

      • Upper Trip Point: $$\displaystyle V_{UTP} = V_{ref} \left(1 + \frac{R_1}{R_2}\right) $$.

      • Lower Trip Point: $$\displaystyle V_{LTP} = V_{ref} \left(1 - \frac{R_1}{R_2}\right) $$.

      • Hysteresis width $$\displaystyle = V_{UTP} - V_{LTP} = \frac{2R_1}{R_2} V_{ref} $$.

      • Applications: Noise immunity, square wave generation.

  • Waveform Generation:

    • Integrator (feedback capacitor $C$):

      • $$\displaystyle V_{out} = -\frac{1}{RC} \int V_{in} dt $$.

      • Sinusoidal input → phase-shifted cosine (90° lag).

      • Square wave input → triangular wave.

    • Differentiator (input capacitor $C$):

      • $$\displaystyle V_{out} = -RC \frac{dV_{in}}{dt} $$.

      • Sinusoidal input → phase-shifted sine (90° lead).

      • Square wave input → spikes at transitions.

    • Practical: Add $$\displaystyle R_f $$ in parallel with $C$ (integrator) or $$\displaystyle R_{in} $$ in series with $C$ (differentiator) to limit low-frequency gain.

  • Logarithmic Amplifier:

    • Circuit: Diode in feedback path (or transistor $$\displaystyle V_{BE} $$). $$\displaystyle I_f = I_S e^{V_{BE}/V_T} $$.

    • Operation: $$\displaystyle V_{out} = -V_T \ln\left(\frac{V_{in}}{I_S R}\right) \propto -\ln(V_{in}) $$.

    • Design: Given $$\displaystyle V_{in} $$, diode $$\displaystyle I_S $$, choose $R$ so $$\displaystyle V_{out} $$ within range.

  • Antilog Amplifier: Diode in input path. $$\displaystyle V_{out} \propto e^{V_{in}/V_T} $$.

  • Active Filters:

    • Second-Order Low-Pass (Multiple Feedback):

      • Circuit: Op-amp, two capacitors, three resistors.

      • Cutoff Frequency: $$\displaystyle f_c = \frac{1}{2\pi \sqrt{R_2 R_3 C_1 C_2}} $$.

      • Passband Gain: $$\displaystyle A_0 = 1 + \frac{R_f}{R_1} $$ (if $$\displaystyle R_f $$ from output to (-), $$\displaystyle R_1 $$ from (-) to ground).

      • Design: Given $$\displaystyle f_c $$, $$\displaystyle A_0 $$, choose $$\displaystyle C_1=C_2=C $$, then $$\displaystyle R_2 R_3 = \frac{1}{(2\pi f_c C)^2} $$, $$\displaystyle R_f/R_1 = A_0 - 1 $$.


7. Multivibrators and Timer Circuits

7.1 Multivibrators

  • Astable Multivibrator (Oscillator):

    • Two stable states, switches continuously. No stable state.

    • Op-Amp Version: Positive feedback with RC network. Frequency $$\displaystyle f = \frac{1}{2RC \ln\left(\frac{1+\beta}{1-\beta}\right)} $$, $$\displaystyle \beta = \frac{R_2}{R_1+R_2} $$.

    • Transistor Version: Cross-coupled transistors. $$\displaystyle T = 0.69(R_A C_A + R_B C_B) $$.

  • Bistable Multivibrator (Flip-Flop):

    • Two stable states. Triggered from one state to other.

    • Schmitt Trigger as bistable: Hysteresis provides two thresholds.

  • Monostable Multivibrator (One-Shot):

    • One stable, one quasi-stable. Triggered to quasi-stable for time $T$, then returns.

    • Op-Amp Version: $$\displaystyle T = RC \ln\left(\frac{V_{DD}}{V_{DD} - V_{th}}\right) $$.

    • 555 Version: $$\displaystyle T = 1.1 R C $$.

7.2 555 Timer IC

  • Internal Block Diagram:

    • Voltage Divider: Three 5kΩ resistors → two comparators reference at $$\displaystyle \frac{2}{3}V_{CC} $$ (threshold) and $$\displaystyle \frac{1}{3}V_{CC} $$ (trigger).

    • Flip-Flop: Set by trigger (<1/3), reset by threshold (>2/3).

    • Discharge Transistor: Open collector to pin 7, controlled by FF Q̅.

  • Astable Mode:

    • Circuit: $$\displaystyle R_1 $$, $$\displaystyle R_2 $$, $C$ from discharge pin to $$\displaystyle V_{CC} $$ and ground.

    • Frequency:

$$f = \frac{1.44}{(R_1 + 2R_2)C}$$

\boxed{f = \frac{1.44}{(R_1 + 2R_2)C}}
  • Duty Cycle $$\displaystyle D = \frac{R_1 + R_2}{R_1 + 2R_2} \times 100\% $$ (cannot be <50% with single $$\displaystyle R_2 $$).

  • Monostable Mode:

    • Circuit: $R$, $C$ from discharge pin to ground. Trigger pulse to pin 2.

    • Pulse Width:

$$T = 1.1 R C$$

\boxed{T = 1.1 R C}
  • Output high for $T$, then low.

  • Applications: Pulse generation, time delay, frequency division, PWM generation.


8. Integrated Short-Note Topics

MOSFET (see 3.2)

  • Enhancement: No channel at $$\displaystyle V_{GS}=0 $$. $$\displaystyle V_{GS} > V_{th} $$ (n-MOS) creates channel.

  • Depletion: Channel at $$\displaystyle V_{GS}=0 $$. $$\displaystyle V_{GS} $$ depletes channel.

  • Merits: Very high input impedance ($$\displaystyle >10^{12}\Omega $$), low power, used in digital/analog switches, amplifiers.

Schottky Diode (see 1.3)

  • Metal-semiconductor junction. $$\displaystyle V_F \approx 0.2-0.4V $$, fast switching (no storage time). Used in high-speed digital circuits, RF detectors, clamping.

Hartley-Colpitts Oscillator (see 5.2)

  • Hartley: Tapped inductor feedback. $$\displaystyle f_0 = \frac{1}{2\pi \sqrt{(L_1+L_2)C}} $$.

  • Colpitts: Split capacitor feedback. $$\displaystyle f_0 = \frac{1}{2\pi \sqrt{L \frac{C_1 C_2}{C_1+C_2}}} $$.

  • Both used for RF generation. Hartley: easier tuning (vary L); Colpitts: better stability (capacitors more stable).

Schmitt Trigger (see 6.3 & 7.1)

  • Hysteresis: Two distinct threshold voltages ($$\displaystyle V_{UTP} $$, $$\displaystyle V_{LTP} $$).

  • Transfer Characteristic: S-shaped curve. Output switches when input crosses thresholds.

  • Circuit: Positive feedback op-amp or comparator. $$\displaystyle V_{UTP} = V_{ref}(1+R_1/R_2) $$, $$\displaystyle V_{LTP} = V_{ref}(1-R_1/R_2) $$.

  • Applications: Noise immunity, waveform shaping (sine to square), debouncing switches.

[!TIP] Schmitt Trigger hysteresis width = $$\displaystyle V_{UTP} - V_{LTP} = \frac{2R_1}{R_2} V_{ref} $$ (for non-inverting). Remember sign for inverting configuration.

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