UNIT 1: Semiconductor Devices & Basic Circuits

I. SEMICONDUCTOR DIODES & RECTIFICATION

P-N Junction Diode

• Physical Structure: Formed by joining P-type (hole majority) and N-type (electron majority) semiconductor materials.

• Working Principle:

  • Forward Bias: P connected to +ve, N to -ve. Reduces depletion region, current flows exponentially after knee voltage (~0.7V Si, 0.3V Ge).

  • Reverse Bias: P to -ve, N to +ve. Widens depletion region, only tiny reverse saturation current ($$\displaystyle I_{S} $$) flows.

• V-I Characteristics:

  • Forward: Exponential rise after knee. $$\displaystyle I = I_S \left( e^{\frac{V}{\eta V_T}} - 1 \right) $$, where $$\displaystyle V_T = kT/q \approx 26\,\text{mV} $$ at room temp, $$\displaystyle \eta = 1-2 $$.

  • Reverse: Small constant $$\displaystyle I_S $$ until breakdown.

• Breakdown Mechanisms:

  • Zener Breakdown: High electric field in narrow depletion region (heavy doping) at low voltage (<5V). Reversible.

  • Avalanche Breakdown: Carrier multiplication by collision at high reverse voltage. Reversible.

• Key Parameters:

  • Knee Voltage ($$\displaystyle V_K $$): Voltage where diode starts conducting heavily.

  • Reverse Saturation Current ($$\displaystyle I_S $$): Very small current in reverse bias.

  • Junction Capacitance: Varies with applied bias.

• Applications: Rectification, clipping, clamping, voltage regulation (Zener), switching, protection.

[!TIP] Exam Focus: Be prepared to sketch forward/reverse characteristics, explain the physical reason for knee voltage, and distinguish between Zener and avalanche breakdown.

Special Purpose Diodes

Rectifiers & Filters

1. Rectifiers

• Half-Wave Rectifier (HWR):

  • Circuit: Single diode in series with load $$\displaystyle R_L $$.

  • Output: $$\displaystyle V_{DC} = \frac{V_m}{\pi} $$, $$\displaystyle I_{DC} = \frac{V_m}{\pi R_L} $$.

  • Efficiency ($\eta$) = 40.6% (max).

  • Ripple frequency = $$\displaystyle f_{in} $$.

• Full-Wave Rectifier (FWR):

  • Center-Tapped (CT): Two diodes, center-tapped transformer. $$\displaystyle V_{DC} = \frac{2V_m}{\pi} $$.

  • Bridge: Four diodes. $$\displaystyle V_{DC} = \frac{2V_m}{\pi} $$ (no CT needed).

  • Efficiency ($\eta$) = 81.2% (max).

  • Ripple frequency = $$\displaystyle 2f_{in} $$.

2. Rectification Efficiency Derivation (FWR)

For FWR, $$\displaystyle P_{DC} = \left(\frac{2V_m}{\pi}\right)^2 \frac{1}{R_L} $$. $$\displaystyle P_{AC} = \frac{V_m^2}{R_L} $$ (rms of output).

$$\eta_{max} = \frac{P_{DC}}{P_{AC}} = \frac{4}{\pi^2} \approx 0.812 = \boxed{81.2\%}$$

3. Ripple Factor ($\gamma$)

$$\displaystyle \gamma = \frac{\text{rms value of AC component}}{\text{DC component}} = \sqrt{\left(\frac{V_{rms}}{V_{DC}}\right)^2 - 1} $$

• For HWR: $$\displaystyle \gamma = 1.21 $$

• For FWR with Capacitor Filter (C-type):

  • $$\displaystyle V_{ripple(rms)} \approx \frac{I_{DC}}{2\sqrt{3} f C} $$ for $C$ large.

  • $$\displaystyle \gamma \approx \frac{1}{2\sqrt{3} f R_L C} $$ (discharge time $\approx T/2$).

• For FWR with Choke Input Filter (L-type):

  • $$\displaystyle V_{DC} \approx \frac{2\sqrt{2} V_m}{\pi} - I_{DC} \omega L $$ (choke opposes ripple).

  • $$\displaystyle \gamma \approx \frac{R_L}{\omega L} $$ (for $L$ large, $$\displaystyle R_L/\omega L \ll 1 $$).

4. LC Filter Design

Given ripple % ($\gamma \times 100$), frequency $f$, and load current $$\displaystyle I_{DC} $$.

For LC filter (Choke-Input): $$\displaystyle \gamma \approx \frac{R_L}{\omega L} = \frac{I_{DC} \cdot R_L}{V_{DC}} \cdot \frac{1}{\omega L} $$? Actually, standard design: $$\displaystyle V_{DC} \approx \frac{2\sqrt{2}V_m}{\pi} - I_{DC} \cdot 2\pi f L $$. Ripple $$\displaystyle \gamma \approx \frac{R_L}{2\pi f L} $$.

Given $\gamma$, $f$, $$\displaystyle I_{DC} $$ → Need $$\displaystyle L/R_L $$ ratio. Often $L$ and $C$ chosen such that $$\displaystyle f_0 = \frac{1}{2\pi\sqrt{LC}} $$ is low.

5. Voltage Multipliers

• Half-Wave Voltage Doubler: Uses capacitor charge pump during +ve half-cycle. $$\displaystyle V_{out} \approx 2V_m $$.

• Full-Wave Voltage Doubler (Voltage Tripler/Quadrupler): Cascaded stages. $$\displaystyle V_{out} \approx nV_m $$ for n-stage.

[!TIP] Common Pitfall: Confusing ripple factor formulas for C-filter vs L-filter. Remember: C-filter ripple $\propto 1/(fRC)$, L-filter ripple $$\displaystyle \propto R_L/(\omega L) $$.

II. BIPOLAR JUNCTION TRANSISTORS (BJT)

BJT Fundamentals

• Structure: NPN or PNP. Three regions: Emitter (heavily doped), Base (thin, lightly doped), Collector (moderately doped).

• Current Components: $$\displaystyle I_E = I_C + I_B $$. $$\displaystyle I_C \approx \alpha I_E $$, $$\displaystyle I_C = \beta I_B $$.

• $\alpha$ & $\beta$ Relationship:

$$I_C = \alpha I_E = \beta I_B$$

$$I_E = I_C + I_B = \beta I_B + I_B = (\beta + 1)I_B$$

$$\therefore \alpha = \frac{\beta}{\beta + 1}, \quad \beta = \frac{\alpha}{1 - \alpha}$$

• Operating Regions:

  • Cut-off: $$\displaystyle V_{BE} < 0.7\,\text{V} $$ (Si), $$\displaystyle I_B \approx 0 $$, $$\displaystyle I_C \approx 0 $$. Transistor OFF.

  • Active: $$\displaystyle V_{BE} \approx 0.7\,\text{V} $$, $$\displaystyle V_{CE} > V_{BE} $$. $$\displaystyle I_C = \beta I_B $$. Used for amplification.

  • Saturation: $$\displaystyle V_{BE} \approx 0.7\,\text{V} $$, $$\displaystyle V_{CE} < V_{BE} $$. Both junctions forward biased. $$\displaystyle I_C < \beta I_B $$. Transistor ON (switch).

BJT Configurations

BJT Biasing & Stability

• Objective: Establish stable $$\displaystyle I_C $$ (Q-point) independent of $\beta$ and temperature.

• Stability Factor (S): $$\displaystyle S = \frac{1 + \beta}{1 + \beta \frac{R_B}{R_B + R_E}} $$ for voltage divider bias. Lower $S$ → better stability.

• Voltage Divider Bias (Self-Bias):

  • Circuit: $$\displaystyle R_1 $$, $$\displaystyle R_2 $$ form voltage divider from $$\displaystyle V_{CC} $$ to ground. Emitter resistor $$\displaystyle R_E $$.

  • Analysis: $$\displaystyle V_B \approx \frac{R_2}{R_1+R_2}V_{CC} $$. $$\displaystyle V_E = V_B - V_{BE} $$. $$\displaystyle I_E \approx I_C = \frac{V_E}{R_E} $$.

  • Advantage: $$\displaystyle I_C $$ largely independent of $\beta$ due to negative feedback via $$\displaystyle R_E $$.

• Thermal Runaway: Increase in $$\displaystyle I_C $$ → increase in power dissipation ($$\displaystyle I_C V_{CE} $$) → temperature rise → further increase in $$\displaystyle I_C $$. Prevented by: Emitter resistor $$\displaystyle R_E $$ (stabilization), heat sinking.

Small-Signal Analysis: h-Parameter Model (CE Configuration)

• Hybrid Parameters (at given $$\displaystyle I_{CQ}, V_{CEQ} $$):

  • $$\displaystyle h_{ie} = \left. \frac{\Delta V_{BE}}{\Delta I_B} \right|_{V_{CE}=const} $$ (input impedance)

  • $$\displaystyle h_{fe} = \left. \frac{\Delta I_C}{\Delta I_B} \right|_{V_{CE}=const} \approx \beta $$ (forward current gain)

  • $$\displaystyle h_{oe} = \left. \frac{\Delta I_C}{\Delta V_{CE}} \right|_{I_B=const} $$ (output admittance)

  • $$\displaystyle h_{re} = \left. \frac{\Delta V_{BE}}{\Delta V_{CE}} \right|_{I_B=const} $$ (reverse voltage gain, usually $\ll 1$)

• CE Amplifier Gain: $$\displaystyle A_v = \frac{v_o}{v_i} = -h_{fe} \frac{R_C \parallel R_L}{h_{ie} + (\beta + 1)R_E} $$ (if $$\displaystyle R_E $$ unbypassed).

Compound Transistors

• Darlington Pair: Two NPN transistors connected: $$\displaystyle I_{C1} = \beta_1 I_{B1} $$, $$\displaystyle I_{C2} = \beta_2 I_{B2} \approx \beta_2 I_{C1} $$. Overall $$\displaystyle \beta_{total} \approx \beta_1 \beta_2 $$ (very high).

• Advantages: Very high input impedance, high current gain.

• Disadvantages: High $$\displaystyle V_{BE} $$ ($\approx 1.4\,\text{V}$), slow turn-off (saturation), high leakage.

[!TIP] Exam Focus: Derive $\alpha$-$\beta$ relationship. Compare configurations in a table. Draw DC load line, find Q-point. Explain stability factor S for different biasing circuits.

III. FIELD EFFECT TRANSISTORS (FET & MOSFET)

JFET (Junction FET)

• Construction: N-channel (or P-channel) bar with gate diffused. Gate-channel junction is reverse biased.

• Working: $$\displaystyle V_{GS} $$ controls width of depletion region → controls channel resistance → controls $$\displaystyle I_D $$.

• V-I Characteristics:

  • Ohmic Region: Small $$\displaystyle V_{DS} $$, $$\displaystyle I_D \propto V_{DS} $$ (acts like voltage-controlled resistor).

  • Saturation/Active Region: $$\displaystyle I_D $$ constant with $$\displaystyle V_{DS} $$ (for $$\displaystyle V_{DS} > V_{GS} - V_P $$). $$\displaystyle I_D = I_{DSS} \left(1 - \frac{V_{GS}}{V_P}\right)^2 $$.

  • Cut-off: $$\displaystyle V_{GS} \le V_P $$ (or $$\displaystyle V_{GS(off)} $$), $$\displaystyle I_D \approx 0 $$.

• Parameters:

  • Pinch-off Voltage ($$\displaystyle V_P $$): $$\displaystyle V_{GS} $$ at which channel closes ($$\displaystyle I_D=0 $$). Negative for N-JFET.

  • Drain Saturation Current ($$\displaystyle I_{DSS} $$): $$\displaystyle I_D $$ when $$\displaystyle V_{GS}=0 $$, $$\displaystyle V_{DS} > |V_P| $$.

• Self-Bias Circuit: $$\displaystyle R_S $$ provides negative feedback. $$\displaystyle V_{GS} = -I_D R_S $$. Solve $$\displaystyle I_D = I_{DSS} \left(1 + \frac{I_D R_S}{V_P}\right)^2 $$ for $$\displaystyle I_D $$, then $$\displaystyle V_{GS}, V_{DS} $$.

MOSFET (Metal-Oxide-Semiconductor FET)

• Construction: Gate insulated from channel by thin SiO₂. No gate current.

• Types:

  • Enhancement Mode (n-channel): $$\displaystyle V_{GS} > V_{th} $$ creates channel. $$\displaystyle I_D = K_n (V_{GS} - V_{th})^2 $$ (sat).

  • Depletion Mode (n-channel): Channel exists at $$\displaystyle V_{GS}=0 $$. $$\displaystyle V_{GS} $$ can deplete it. $$\displaystyle I_D = I_{DSS} \left(1 - \frac{V_{GS}}{V_P}\right)^2 $$ (similar to JFET).

• Symbols: Arrow direction for body diode, line for channel.

• Comparison with JFET:

  | Feature | JFET | MOSFET | | :--- | :--- | :--- | | Gate Type | Reverse biased pn junction | Insulated (capacitive) | | Input Impedance | Very high ($$\displaystyle \approx 10^9\,\Omega $$) | Extremely high ($$\displaystyle >10^{12}\,\Omega $$) | | Mode | Usually depletion | Enhancement & depletion | | Switching Speed | Fast | Very fast (no minority charge) | | Susceptibility | Gate breakdown possible | Static sensitive (oxide damage) |

CMOS

• Concept: Complementary pair (n-MOS + p-MOS) used as inverter.

• Advantages: Very low static power (one device OFF), high noise margin, high fan-out.

[!TIP] Exam Focus: JFET self-bias design problem is frequent. Know $$\displaystyle I_D $$ equation for saturation. Distinguish enhancement vs depletion MOSFET symbols and operation.

IV. AMPLIFIERS & FEEDBACK

Amplifier Classification (by Q-point)

Power Amplifiers

• Class A: Single transistor, $$\displaystyle V_{CEQ} \approx V_{CC}/2 $$. $$\displaystyle P_{O(max)} = \frac{V_{CC}^2}{8R_L} $$, $$\displaystyle \eta_{max} = 50\% $$ (with transformer).

• Class B (Push-Pull): Two transistors (NPN/PNP), each conducts 180°. $$\displaystyle P_{O(max)} = \frac{V_{CC}^2}{2R_L} $$, $$\displaystyle \eta_{max} = 78.5\% $$.

• Transformer-Coupled vs RC-Coupled:

  • Transformer-Coupled: Impedance matching, DC isolation, high efficiency, bulky, poor low-freq response.

  • RC-Coupled: Direct coupling, compact, good low-freq response, no impedance matching, lower efficiency.

Negative Feedback

• Types (based on sampling & mixing):

  • Voltage-Series (Voltage Amplifier): Sample $$\displaystyle V_o $$, mix in series with $$\displaystyle V_s $$. Increases $$\displaystyle Z_{in} $$, decreases $$\displaystyle Z_{out} $$, decreases $$\displaystyle A_v $$.

  • Voltage-Shunt (Transresistance): Sample $$\displaystyle V_o $$, mix in shunt. Decreases $$\displaystyle Z_{in} $$, decreases $$\displaystyle Z_{out} $$, decreases $$\displaystyle A_v $$.

  • Current-Series (Current Amplifier): Sample $$\displaystyle I_o $$, mix in series. Increases $$\displaystyle Z_{in} $$, increases $$\displaystyle Z_{out} $$, decreases $$\displaystyle A_v $$.

  • Current-Shunt (Current Amplifier): Sample $$\displaystyle I_o $$, mix in shunt. Decreases $$\displaystyle Z_{in} $$, increases $$\displaystyle Z_{out} $$, decreases $$\displaystyle A_v $$.

• Effect on Gain: $$\displaystyle A_{vf} = \frac{A}{1 + A\beta} $$ (reduction).

• Bandwidth Increase: $$\displaystyle BW_{f} = BW \cdot (1 + A\beta) $$ (gain-bandwidth product constant).

• Other Effects: Reduces distortion, increases stability, makes gain less dependent on transistor parameters.

[!TIP] Key Formula: $$\displaystyle A_{vf} = \frac{A}{1+A\beta} $$. Remember: Series mixing → $$\displaystyle Z_{in} $$ ↑; Shunt mixing → $$\displaystyle Z_{in} $$ ↓. Voltage sampling → $$\displaystyle Z_{out} $$ ↓; Current sampling → $$\displaystyle Z_{out} $$ ↑.

V. DIFFERENTIAL & OPERATIONAL AMPLIFIERS

Differential Amplifier

• Circuit (Dual Input, Balanced Output): Two identical transistors with common emitter resistor $$\displaystyle R_E $$ (or current source). $$\displaystyle V_{o1} $$ and $$\displaystyle V_{o2} $$ outputs.

• Key Parameters:

  • Differential Gain ($$\displaystyle A_d $$): $$\displaystyle A_d = \frac{v_{od}}{v_{id}} = \frac{v_{o1} - v_{o2}}{v_{i1} - v_{i2}} $$.

  • Common-Mode Gain ($$\displaystyle A_{cm} $$): $$\displaystyle A_{cm} = \frac{v_{oc}}{v_{ic}} = \frac{(v_{o1} + v_{o2})/2}{v_{i1} = v_{i2} = v_{ic}} $$.

  • CMRR: $$\displaystyle \text{CMRR} = \left| \frac{A_d}{A_{cm}} \right| $$. In dB: $$\displaystyle \text{CMRR}_{dB} = 20 \log_{10} \left| \frac{A_d}{A_{cm}} \right| $$.

• Significance: High CMRR rejects common-mode noise (e.g., power supply ripple) and amplifies differential signal. Forms input stage of op-amp.

Operational Amplifier (Op-Amp)

• Ideal Characteristics:

  • $$\displaystyle A_{OL} \to \infty $$, $$\displaystyle Z_{in} \to \infty $$, $$\displaystyle Z_{out} \to 0 $$

  • Infinite bandwidth, zero offset voltage, infinite CMRR.

• Practical Limitations: Finite $$\displaystyle A_{OL} $$ (80-120 dB), input bias/offset currents, input offset voltage, finite $$\displaystyle Z_{out} $$ (50-200 Ω), limited gain-bandwidth product (GBW), slew rate (SR), CMRR (70-100 dB).

• Basic Configurations:

  • Inverting Amplifier: $$\displaystyle A_v = -\frac{R_f}{R_1} $$ (virtual ground at $$\displaystyle v_- \approx v_+ $$).

  • Non-Inverting Amplifier: $$\displaystyle A_v = 1 + \frac{R_f}{R_1} $$.

  • Summing Amplifier (Inverting): $$\displaystyle V_o = -R_f \left( \frac{V_1}{R_1} + \frac{V_2}{R_2} + ... \right) $$.

  • Integrator: $$\displaystyle V_o = -\frac{1}{RC} \int V_{in} dt $$. Output phase shift 90°.

  • Differentiator: $$\displaystyle V_o = -RC \frac{dV_{in}}{dt} $$. Sensitive to high-frequency noise.

  • Logarithmic Amplifier: Diode in feedback. $$\displaystyle V_o = -V_T \ln \left( \frac{V_{in}}{I_s R} \right) $$.

  • Zero-Crossing Detector: Comparator with $$\displaystyle V_{ref}=0 $$. Output switches when $$\displaystyle V_{in} $$ crosses 0V.

  • Schmitt Trigger: Positive feedback → hysteresis. $$\displaystyle V_{UT} = \frac{R_1}{R_1+R_2}V_{sat} $$, $$\displaystyle V_{LT} = -\frac{R_1}{R_1+R_2}V_{sat} $$. Used for wave shaping, noise immunity.

• Active Filters (First-Order LP): $$\displaystyle f_c = \frac{1}{2\pi RC} $$, $$\displaystyle A_v = 1 + \frac{R_f}{R_1} $$ (non-inverting). Second-order Sallen-Key: $$\displaystyle f_c = \frac{1}{2\pi \sqrt{R_1 R_2 C_1 C_2}} $$, $$\displaystyle Q = \sqrt{\frac{R_1 R_2 C_1 C_2}{R_1 C_2 (R_1 C_1 + R_2 C_2 + R_1 C_2)}} $$.

[!TIP] Critical: Virtual ground concept for inverting amp. Remember integrator/differentiator input-output waveforms (sine → cosine, square → spikes). Schmitt trigger hysteresis calculation.

VI. OSCILLATORS & MULTIVIBRATORS

Feedback Oscillators: Barkhausen Criterion

• Loop Gain: $$\displaystyle |A\beta| = 1 $$

• Phase Shift: $$\displaystyle \angle A\beta = 0^\circ $$ (or $$\displaystyle 360^\circ $$)

RC Oscillators

1. RC Phase Shift Oscillator:

   • Circuit: 3 (or more) RC sections in feedback network + CE amp.

   • Frequency: $$\displaystyle f = \frac{1}{2\pi RC \sqrt{6}} $$ (for 3-section, each RC identical).

   • Condition: $$\displaystyle \beta = \frac{1}{29} $$ for 3-section → $$\displaystyle A_v \ge 29 $$ for oscillation.

2. Wein Bridge Oscillator:

   • Circuit: Series-parallel RC network (Wheatstone bridge) in positive feedback. $$\displaystyle R_f $$ (or bulb) for amplitude stabilization.

   • Frequency: $$\displaystyle f = \frac{1}{2\pi RC} $$ (when $$\displaystyle R_1=R_2=R $$, $$\displaystyle C_1=C_2=C $$).

   • Condition: $$\displaystyle A_v \ge 3 $$ for oscillation.

LC Oscillators

• Hartley: Feedback from tapped inductor (or split inductor). $$\displaystyle f = \frac{1}{2\pi \sqrt{L_{eq} C}} $$, $$\displaystyle L_{eq} = L_1 + L_2 + 2M $$ (if coupled).

• Colpitts: Feedback from tapped capacitor. $$\displaystyle f = \frac{1}{2\pi \sqrt{L C_{eq}}} $$, $$\displaystyle C_{eq} = \frac{C_1 C_2}{C_1 + C_2} $$.

• Crystal Oscillator: Crystal as high-Q series/parallel resonant circuit. $$\displaystyle f \approx f_s $$ (series) or $$\displaystyle f_p $$ (parallel). Extremely stable frequency due to high Q.

Multivibrators

• Astable (Free-Running): No stable state. Generates square wave.

  • Op-Amp Version: Hysteresis with positive feedback + RC charging.

  • 555 Astable: $$\displaystyle T = 0.693 (R_A + 2R_B)C $$, $$\displaystyle f = \frac{1.44}{(R_A + 2R_B)C} $$, Duty Cycle $$\displaystyle = \frac{R_A + R_B}{R_A + 2R_B} \times 100\% $$.

• Monostable (One-Shot): One stable state, one quasi-stable. Triggered output pulse.

  • 555 Monostable: $$\displaystyle T = 1.1 R C $$.

• Bistable (Flip-Flop): Two stable states. No timing capacitor. Triggered to switch states. Schmitt trigger is a bistable comparator.

[!TIP] Derivations: Be ready to derive $f$ for RC phase shift (show phase shift per section = $$\displaystyle \tan^{-1}(\omega RC) $$, total 180°). For 555 astable, derive charging/discharging times.

VII. WAVEFORM SHAPING CIRCUITS & TIMERS

Clippers

• Principle: Remove (clip) portion of input signal above/below a reference level.

• Single-Ended: Clips positive or negative peaks.

• Double-Ended:

  • Equal Amplitude: Clips both peaks equally at $$\displaystyle \pm V_{ref} $$. Uses two diodes in parallel opposing.

  • Unequal Amplitude: Clips at two different levels. Uses two references (e.g., two Zeners back-to-back).

Clampers (DC Restorers)

• Principle: Shift entire waveform up/down by adding a DC level.

• Clamping Theorem: For ideal diode & capacitor, output swings symmetrically around input average.

• Positive Clamper: Output $$\displaystyle V_o = V_{in} + V_m $$ (peak positive at 0V).

• Biased Clamper: Adds DC bias $$\displaystyle V_{bias} $$ to set clamping level at $$\displaystyle V_{bias} $$.

555 Timer IC

• Internal Blocks: Two comparators, SR flip-flop, discharge transistor, voltage divider (3x $R$).

• Pin Diagram: Pin 1 GND, 2 TRIG, 3 OUT, 4 RESET, 5 CTRL, 6 THR, 7 DIS, 8 VCC.

• Astable Mode: Capacitor $C$ charges via $$\displaystyle R_A+R_B $$ (THR high), discharges via $$\displaystyle R_B $$ (DIS low). Frequency & duty cycle as above.

• Monostable Mode: Trigger on pin 2 (<1/3 $$\displaystyle V_{CC} $$) sets FF, output high, $C$ charges via $R$ until THR > 2/3 $$\displaystyle V_{CC} $$, resets FF, output low, $C$ discharges via pin 7.

• Applications: Pulse generation, time delay, frequency divider, missing pulse detector.

[!TIP] Waveforms: Draw input/output for clippers/clampers. For 555, sketch capacitor voltage and output waveform, marking $$\displaystyle T_{on} $$, $$\displaystyle T_{off} $$.

VIII. MISCELLANEOUS & SHORT NOTE TOPICS

Power Supply Performance Metrics

• Ripple Factor ($\gamma$): Measure of AC residue in DC output. Lower is better.

• Voltage Regulation: $$\displaystyle \% \text{Reg} = \frac{V_{NL} - V_{FL}}{V_{FL}} \times 100\% $$. Lower is better.

• Efficiency ($\eta$): $$\displaystyle \frac{P_{DC}}{P_{AC}} $$ from transformer secondary.

Thermal Runaway in Transistors

• Cause: $$\displaystyle I_{CBO} $$ increases with temperature → $$\displaystyle I_C $$ increases → $$\displaystyle P_{diss} $$ increases → temperature further increases.

• Prevention: Use emitter resistor $$\displaystyle R_E $$ (negative feedback), heat sink, bias stabilization (voltage divider).

Short Notes (Frequent 3-4 Mark Questions)

1. MOSFET (Enhancement/Depletion): See Section III. Key: Enhancement requires $$\displaystyle V_{GS} > V_{th} $$ to form channel; Depletion has channel at $$\displaystyle V_{GS}=0 $$.

2. Schottky Diode: Metal-semiconductor junction. Low $$\displaystyle V_F $$, fast switching, used in high-frequency rectifiers and TTL logic.

3. Hartley vs Colpitts Oscillator: Both LC. Hartley uses tapped inductor feedback; Colpitts uses tapped capacitor. $$\displaystyle f_{Hartley} = \frac{1}{2\pi\sqrt{L_{eq}C}} $$, $$\displaystyle f_{Colpitts} = \frac{1}{2\pi\sqrt{LC_{eq}}} $$. Hartley easier to tune (vary L), Colpitts better for high freq (lower capacitor values).

4. Schmitt Trigger: Op-amp/comparator with positive feedback. Exhibits hysteresis. Converts slow-changing signal to clean digital output. $$\displaystyle V_{UT}, V_{LT} $$ determined by feedback ratio.

5. Varactor Diode: Reverse-biased pn junction with capacitance $$\displaystyle C \propto (V_{bi} + V_R)^{-n} $$. Used in VCOs, frequency multipliers, parametric amplifiers.

6. Crystal Oscillator: Quartz crystal equivalent to series RLC with very high Q. Oscillates at series or parallel resonant frequency. Highest frequency stability among oscillators.

7. Bistable Multivibrator: Two stable states. No capacitor. Changes state with trigger. Used as flip-flop, memory element, Schmitt trigger is a special case.

8. Op-Amps (Overview): High-gain differential amplifier. Ideal: infinite gain, $$\displaystyle Z_{in} $$, bandwidth; zero $$\displaystyle Z_{out} $$, offset. Used in linear (amps, filters) and non-linear (comparators, oscillators) applications.

9. LED: Light Emitting Diode. Direct bandgap semiconductor (GaAsP, GaN). Forward biased emits light. Requires current limiting resistor. Advantages: low voltage, long life, fast switching.

[!TIP] For short notes, define the device/circuit, state its key characteristic/principle, and give one major application. Be concise.