Process Control Instrumentation (EC-504 (C)) Unit 2 Notes

UNIT 2: INSTRUCTION PROCESSING AND EXECUTION

This unit covers the fundamental steps a CPU follows to execute a program, from fetching an instruction to performing the specified operation. It forms the core of how software controls hardware.

1. Instruction Cycle (Fetch-Decode-Execute)

The instruction cycle (or fetch-execute cycle) is the basic operation cycle of a computer. It is the process by which a computer retrieves a program instruction from its memory, decodes it, and executes it.

Phase	Description	Key Registers/Components Involved	Significance
Fetch	The Program Counter (PC) holds the address of the next instruction. This address is sent to the Memory Address Register (MAR), and the instruction is read from memory into the Memory Data Register (MDR). It is then loaded into the Instruction Register (IR). The PC is incremented to point to the next instruction.	PC → MAR → Memory → MDR → IR	Fetches the raw instruction bytes from memory. PC increment ensures sequential execution unless a branch/jump occurs.
Decode	The Control Unit (CU) examines the opcode (operation code) field in the IR. It determines what operation is to be performed and what additional data (operands) are needed. It generates the necessary control signals for the subsequent execution phase.	Control Unit, Opcode Decoder	Translates the binary instruction into specific control signals. Determines which functional units (ALU, registers, etc.) will be activated.
Execute	The CU's control signals orchestrate the actual operation. This could involve the ALU performing an arithmetic/logic function, moving data between registers, or accessing memory for a load/store operation. Results are written back to a destination (register or memory).	ALU, General Purpose Registers, MDR, MAR	The core computational step. The specific actions depend entirely on the decoded opcode and addressing mode.

Exam Tip: A common question asks you to trace the cycle for a specific instruction (e.g., ADD R1, R2). Be prepared to state the role of PC, MAR, MDR, IR, and the ALU in each phase.

2. Micro-operations and Register Transfer Language (RTL)

Micro-operations: The elementary operations performed on the data stored in registers. They are the atomic steps that constitute a machine instruction.
- Types:
  1. Transfer: Move data between registers (e.g., R1 ← R2).
  2. Arithmetic: Performed by ALU (e.g., R1 ← R1 + R2).
  3. Logic: Bitwise operations by ALU (e.g., R1 ← R1 AND R2).
  4. Shift: Logical/arithmetic shift operations.
Register Transfer Language (RTL): A symbolic language used to describe the sequence of micro-operations. It specifies the transfer of data between registers and the operations performed on it.
- Syntax: Destination ← Source or Destination ← Operation(Source1, Source2)
- Example: The instruction ADD R1, R2 might be described by RTL as:
```
R1 ← R1 + R2
```
  This implies a sequence: (1) Transfer R1 and R2 to ALU inputs, (2) Perform addition, (3) Transfer result from ALU output to R1.

Exam Tip: You may be asked to write the RTL for a given sequence of assembly/machine code instructions or vice-versa. Focus on identifying the source and destination registers for each micro-operation.

3. Instruction Formats

An instruction is a binary code that specifies:

Opcode (Operation Code): Specifies the operation to be performed (e.g., ADD, LOAD).
Address Field(s): Specifies the location of the operand(s) (register or memory address).
Mode Field: Specifies the addressing mode (how the address field is interpreted).

Common Formats:

Format	Structure	Example (16-bit)	Pros & Cons
2-Address	`OPCODE	Address1	Address2`<br>Result is stored in one of the address locations (often` Address1`).
3-Address	`OPCODE	Address1	Address2
1-Address	`OPCODE	Address`<br>Uses an implied accumulator (AC) register for one operand and result.	`ADD 2000`<br>(AC ← AC + Mem[2000])

Bit Allocation: Given total instruction length (n bits), opcode bits (k bits), and number of address fields (A), the bits per address field = (n - k) / A. The number of addressable locations = 2^(bits per address field).

Exam Tip: A classic problem: "An instruction format has a 6-bit opcode and is 2-address with a total length of 16 bits. How many distinct instructions and memory locations are possible?"

Solution: Address field size = (16 - 6) / 2 = 5 bits per address.

\boxed{\text{Instructions} = 2^6 = 64} \quad \boxed{\text{Memory Locations} = 2^5 = 32}

4. Addressing Modes

The addressing mode specifies how the address field of an instruction is interpreted to find the effective address (EA) of the operand.

Mode	How EA is Calculated	Example (Assume `ADD` instruction, `x=100`)	Typical Application
Immediate	Operand is part of the instruction itself.	`ADD R1, #5`<br>`R1 ← R1 + 5`	Loading constants, setting initial values.
Direct (Absolute)	Address field gives the actual memory address of the operand.	`ADD R1, 100`<br>`R1 ← R1 + Mem[100]`	Accessing global variables, simple data structures.
Indirect	Address field points to a memory location that contains the actual address of the operand.	`ADD R1, @100`<br>`R1 ← R1 + Mem[Mem[100]]`	Implementing pointers, dynamic data structures (linked lists).
Register	Operand is in a CPU register specified by the address field.	`ADD R1, R2`<br>`R1 ← R1 + R2`	Fast operations on local variables, intermediate results.
Register Indirect	Register specified by address field contains the memory address of the operand.	`ADD R1, (R2)`<br>`R1 ← R1 + Mem[R2]`	Array/string traversal, pointer dereferencing.
Indexed (Base-Indexed)	EA = Address field + contents of an index register (XR).	`ADD R1, 100(R2)`<br>`R1 ← R1 + Mem[100 + R2]`	Accessing array elements (base address + offset).
Relative (PC-relative)	EA = PC + Address field (signed offset).	`JUMP +10`<br>Target = PC + 10	Position-independent code, loops, conditional branches.

Exam Tip: Be able to identify the mode from an instruction and compute the Effective Address (EA). Remember:

@ or * often denotes Indirect.

(R) denotes Register Indirect.

100(R) denotes Indexed.

# denotes Immediate.

No symbol usually means Direct (or Register if the address is a register name).

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Process Control Instrumentation (EC-504 (C)) - Unit 2 Short Notes