EC-501 Microprocessor and its Applications - Nov 2022 Question Paper

Under each question, How to answer lists the points an answer should cover, outlined by CampusPrep from the syllabus. Check the details against your textbook.

1. 3 Marks
   a"The benefits of RISC design principles were widely understood and accepted". Give two examples of the benefits of RISC over CISC.
   How to answer

   • Define RISC vs CISC philosophy
   • Benefit 1 e.g. simple fixed-length instructions, single-cycle execution, pipelining
   • Benefit 2 e.g. load-store architecture, reduced hardware complexity, compiler optimization
2. 4 Marks
   bExplain briefly about the Pentium burst cycle operation and its U-pipe and V-pipe operation.
   How to answer

   • Define Pentium burst cycle for cache line fill
   • Explain burst sequence and signals
   • Explain U-pipe and V-pipe dual superscalar pipelines and pairing rules
3. 7 Marks
   cCompare 80386, 80486, and Pentium based on Architecture.
   How to answer

   • Outline 80386 32-bit architecture, no FPU on-chip
   • Outline 80486 with on-chip FPU and 8KB cache
   • Outline Pentium superscalar, 64-bit data bus, dual pipeline
   • Compare on bus width, cache, FPU, performance
4. 7 Marks
   aWhat is the difference between minimum and maximum modes of 8086? How are these modes selected? Draw and explain the minimum mode configuration of a microprocessor 8086 based computer system.
   How to answer

   • How MN/MX pin selects minimum vs maximum mode
   • Difference in control signal generation and multiprocessor support
   • Minimum mode circuit with 8086, latches, transceivers, clock generator
   • Explanation of ALE, DEN, DT/R, M/IO usage
5. 7 Marks
   bExplain the various addressing modes of 8086 with suitable example. What are displacement, base and index? What is an effective address or offset?
   How to answer

   • List 8086 addressing modes with example instruction each
   • Define displacement, base register, index register
   • Define effective address / offset and physical address formation
   • Give example of base-index-displacement calculation
6. 3 Marks
   aGiven that the stack segment register is pointing to location 2408h, the stack pointer register contains 000Ah, location 2408Ah contains 8934h and location 2408Ch contains 1243h, indicate the address of the bottom of the stack, and the address of the top of the stack. If the instruction POP AX followed by instruction POP BX are performed, calculate the new value of SP and the values of AX and BX.
   How to answer

   • Physical address = SS*16 + SP; identify bottom and top of stack
   • POP increments SP by 2 per instruction
   • AX gets contents of 2408Ah = 8934h, BX gets 1243h
   • Calculate new SP = 000Eh
7. 4 Marks
   bWhat is the difference between CALL and JMP instruction of 8086 microprocessors?
   How to answer

   • Define CALL: saves return address on stack, changes IP/CS
   • Define JMP: unconditional transfer without saving return
   • Compare stack use, return capability, types (near/far)
8. 7 Marks
   cWrite an 8086 program to clears the 4 lest significant bits of BL without changing other bits and store result in BH?
   How to answer

   • Use AND mask F0h to clear lower 4 bits of BL
   • MOV result to BH preserving other bits
   • Write 8086 assembly steps with data segment assumption
   • Example: AND BL, 0F0h / MOV BH, BL
9. 3 Marks
   aDetermine the control word for the following configuration of 8255: Port A - Output Mode of port A - Mode 1 Port B - Output Mode of port B - Mode 0 Port C lower (pins PC0 - PC2) - Output.
   How to answer

   • Recall 8255 control word format D7=1 for I/O mode
   • Set Port A output Mode 1, Port B output Mode 0
   • Set Port C lower PC0-PC2 output
   • Combine bits to get control word
10. 4 Marks
    bState the differences between I/O mapped I/O and Memory mapped I/O.
    How to answer

    • Define I/O mapped I/O using IN/OUT and separate address space
    • Define memory mapped I/O using memory instructions
    • Compare on address space, decoding, speed, instructions
11. 7 Marks
    cExplain how eight ON/OFF switches can be interfaced with a microprocessor using 8255 port? Give the hardware and software of it.
    How to answer

    • Configure 8255 port for input switches with pull-ups
    • Draw interfacing hardware: data bus, chip select, control
    • Write initialization control word and read program
    • Explain software polling/debouncing
12. 7 Marks
    aShow how to interface an 8255 chip to the low byte of the 8086 (D0-D7)? Assume the following I/O address ports are used.

    How to answer

    • Use A0,A1 for internal port selection, address decoding for 00H-06H
    • Connect D0-D7 to low byte, even addresses for 8086
    • Draw chip-select logic using A2-A7 and BHE/WR/RD
    • Explain I/O read/write operation
13. 7 Marks
    bWrite a program to interface a 10-key matrix keyboard to an 8086 microprocessor using the 8255A in mode 0.
    How to answer

    • Configure 8255A Mode 0: rows output, columns input
    • Draw 10-key matrix connection to ports
    • Write scanning algorithm: drive row low, read columns
    • Decode key and debounce handling
14. 7 Marks
    aWith the help of block diagram explain the various modes of operation of 8259 in detail.
    How to answer

    • Draw 8259 block diagram: IRR, ISR, IMR, priority resolver, control logic
    • Explain fully nested, rotating, special mask, polling modes
    • Explain ICW and OCW initialization sequence
15. 7 Marks
    bShow how to interface the 8253 to the low byte of the 8086 (D0-D7)? Assume the following I/O port addresses are used.

    How to answer

    • Decode addresses 08h,0Ah,0Ch,0Eh for counters and control
    • Connect D0-D7, A0-A1, RD, WR, CS logic
    • Draw interfacing circuit for low byte
    • Explain I/O access to 8253
16. 7 Marks
    aWhich mode will you use to generate a square wave? Give a flow chart to generate it on 8253.
    How to answer

    • Select Mode 3 square wave generator mode of 8253
    • Explain control word and count loading
    • Draw flowchart: init, load control, load count, output
    • Mention frequency calculation
17. 7 Marks
    bInitialize the 8257 DMA controller to transfer 2KB from memory address 75000h to channel 1 of the 8257 DMA. The I/O ports of the 8257 are connected with the 8086 from address 70h. Transfer 4 MSBs of memory address through O/P port 80h.
    How to answer

    • Calculate 2KB count and base address 75000h split
    • Program 8257 channel 1 address and count registers via 70h ports
    • Send 4 MSBs via O/P port 80h and set mode/command
    • Enable DMA and start transfer sequence
18. 7 Marks
    aList addressing modes of 8051 microcontroller with one suitable instruction each.
    How to answer

    • List immediate, register, direct, indirect, indexed, etc. modes
    • Give one 8051 instruction example for each mode
    • Explain syntax with @Ri, #data, direct address
19. 3 Marks
    bShow the contents of stack after execution of follows instructions. MOV R1, #11H MOV R2, #22H MOV R3, #33H PUSH 1 PUSH 2 PUSH 3
    How to answer

    • Initialize R1=11H, R2=22H, R3=33H
    • PUSH order: stack grows, last pushed on top
    • Show stack contents after PUSH 1,2,3
    • Indicate SP and stack top
20. 4 Marks
    cDescribe the alternate functions of port 3 of 8051 microcontrollers.
    How to answer

    • List P3.0-P3.7 alternate signals: RXD, TXD, INT0, INT1, T0, T1, WR, RD
    • Explain serial, interrupt, timer, external memory functions
    • Mention SFR configuration for alternate use