EC-501 Microprocessor and its Applications - Jun 2025 Question Paper

Under each question, How to answer lists the points an answer should cover, outlined by CampusPrep from the syllabus. Check the details against your textbook.

1. 6 Marks
   aDifferentiate between the RISC and CISC processors.
   How to answer

   • Define RISC with reduced simple fixed-length instructions, load-store architecture
   • Define CISC with complex variable-length instructions, memory-to-memory operations
   • Compare on parameters: instruction set, addressing modes, execution time, pipelining, power, applications
   • Give examples e.g. ARM/MIPS vs 8086/Pentium
2. 8 Marks
   bDraw and explain the architecture of 8086 microprocessor.
   How to answer

   • Draw neat labelled block diagram of 8086 showing BIU and EU
   • Explain BIU: segment registers, IP, address generation, instruction queue
   • Explain EU: general purpose registers, ALU, flags, control
   • Explain working and pipelining between BIU and EU
3. 8 Marks
   aWrite about the register organization of 8086 microprocessor.
   How to answer

   • List 8086 register groups: general purpose, segment, pointer/index, flags
   • Explain AX,BX,CX,DX and AH/AL subdivision and uses
   • Explain CS,DS,SS,ES and IP,SP,BP,SI,DI
   • Explain flag register status and control flags
4. 6 Marks
   bDraw and explain the timing diagram for the memory read cycle of 8086 microprocessor.
   How to answer

   • State memory read cycle uses T1-T4 states, ALE, M/IO, DT/R, RD signals
   • Draw timing waveforms for CLK, ALE, AD0-AD15, A16-A19, RD, DEN, data
   • Explain multiplexed address/data bus operation in T1 and data read in T3
   • Explain wait state Tw if READY not active
5. 8 Marks
   aDescribe various instruction used as data copy/transfer operation.
   How to answer

   • Define data transfer class: MOV, PUSH/POP, XCHG, IN/OUT, LEA/LDS/LES
   • Give format and addressing example for each
   • Explain flags unaffected and byte/word operation
   • Mention string transfer instructions if applicable
6. 6 Marks
   bAdd the contents of memory location 2000H: 0500H to contents of 3000H: 0600H and store the result in 5000H: 0700H.
   How to answer

   • Initialize DS1=2000H, SI=0500H and DS2=3000H, SI=0600H conceptually
   • Load AL/AX from first location and add second location with carry handling
   • Store result to 5000H:0700H using segment:offset
   • Show assembly code with MOV, ADD, ADC, INT 21H/HLT
7. 8 Marks
   aWrite about the various addressing modes supported by 8086 microprocessor.
   How to answer

   • List modes: implied, immediate, register, direct, register indirect, indexed, based-indexed, relative
   • Give syntax example e.g. MOV AX, 5000H; MOV AX,[BX+SI]
   • Explain effective address calculation with segment:offset
   • Mention use in 8086 programming
8. 6 Marks
   bWrite an assembly language program to arrange 53, 25, 19, 02 in ascending order.
   How to answer

   • Initialize array of 4 bytes 53,25,19,02 in memory
   • Use outer and inner loop with compare (CMP) and exchange (XCHG)
   • Show bubble sort logic for ascending order
   • Show final sorted order 02,19,25,53 with HLT
9. 8 Marks
   aDifferentiate between the BSR mode and I/O mode operations.
   How to answer

   • Define 8255 control word and BSR mode for bit set/reset of Port C
   • Define I/O mode: Mode 0, Mode 1, Mode 2 for Ports A,B,C
   • Compare on control word format D7 bit, ports affected, application
   • Give control word examples for each mode
10. 6 Marks
    bInterface two 4K $\times$ 8 EPROM chips with 8086 with the help of suitable memory map.
    How to answer

    • Calculate 4Kx8 needs 12 address lines, two chips give 8K capacity
    • Show address decoding for even/odd bank with BHE and A0 for 8086
    • Draw interfacing diagram with address latch, decoder, RD, WR
    • Give suitable memory map table with start-end addresses
11. 8 Marks
    aDescribe the control word of USART.
    How to answer

    • Define USART 8251A mode instruction and command instruction format
    • Explain baud rate, character length, parity, stop bits selection
    • Explain Tx/Rx enable, error reset, break, modem control bits
    • Draw control word format diagram
12. 6 Marks
    bWhat is the function of Interrupt request register, In-service register and priority resolver?
    How to answer

    • Define 8259 PIC blocks: IRR stores pending interrupts
    • Explain ISR stores interrupts under service
    • Explain priority resolver selects highest priority and generates INT
    • Explain interaction sequence IRR -> resolver -> ISR
13. 8 Marks
    aWrite about the register organization of 8257 DMA controller.
    How to answer

    • List 8257 channels: address, count, mode, status registers
    • Explain 16-bit DMA address and terminal count registers per channel
    • Explain mode set and status/command registers
    • Mention update and read/write operations
14. 6 Marks
    bDraw and explain the block diagram of 8051 microcontroller.
    How to answer

    • Draw labelled block diagram of 8051: CPU, RAM, ROM, timers, serial, ports
    • Explain oscillator, program/data memory, interrupt control
    • Explain I/O ports P0-P3 and timer/counter function
    • Explain data flow and control
15. 8 Marks
    aWrite about the various addressing modes of 8051 microcontroller.
    How to answer

    • List 8051 modes: immediate, direct, indirect, register, indexed, relative, absolute
    • Give example for each e.g. MOV A,#data; MOV A,@R0
    • Explain program vs data memory addressing
    • Mention bit addressing
16. 6 Marks
    bWhat is the function of following pins?

    1. i)ALE
    2. ii)P0.0 - P0.7
    3. iii)PSEN
    4. iv)RST
    How to answer

    • Explain ALE as address latch enable for multiplexed address/data demultiplexing
    • Explain P0.0-P0.7 as multiplexed address/data port
    • Explain PSEN as program store enable for external ROM read
    • Explain RST as reset input for initialization