Quantum Computing (AL-802 (D)) - Important Questions
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Unit 37 Marks Low Priority
Define the Pauli operators $X$, $Y$ and $Z$. Describe their action on the computational basis states $\lvert 0\rangle$ and $\lvert 1\rangle$, and state their eigenvalues and eigenvectors.
Core definition and basic action of fundamental single-qubit gates; standard short-answer question.
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Unit 37 Marks Low Priority
Define the Hadamard gate $H$. Show how $H$ acts on $\lvert 0\rangle$ and $\lvert 1\rangle$ to create superposition states. Explain how $H$ is used to convert between the computational basis and the $\{\lvert +\rangle,\lvert -\rangle\}$ basis.
Standard question testing Hadamard matrix and superposition creation; common exam topic for circuits.
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Unit 37 Marks Low Priority
Define the single-qubit phase gates $S$ and $T$. Explain their geometric interpretation on the Bloch sphere and show how they affect a general qubit state $\alpha\lvert 0\rangle+\beta\lvert 1\rangle$.
Phase gates are fundamental single-qubit phase-shift operations; typically asked in theory and circuit contexts.
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Unit 314 Marks Low Priority
Describe the Controlled-NOT ($\mathrm{CNOT}$) gate. Give its action on the computational basis states and explain how a circuit with $H$ on the control qubit followed by $\mathrm{CNOT}$ can produce a Bell state from $\lvert 00\rangle$. Show the state evolution step by step.
Essential two-qubit gate question: CNOT action, matrix/truth-table and entanglement demonstration — standard long/problem question.
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Unit 310 Marks Low Priority
Define the Controlled-$Z$ ($\mathrm{CZ}$) gate. Show how $\mathrm{CZ}$ is related to $\mathrm{CNOT}$ using Hadamard gates on the target qubit. Draw the equivalent circuits and explain the equivalence.
Circuit equivalence between controlled-Z and CNOT with Hadamards; common circuit identity asked in exams.
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Unit 310 Marks Low Priority
State and explain the universality result: why arbitrary single-qubit gates together with any entangling two-qubit gate (for example $\mathrm{CNOT}$) form a universal gate set for quantum computation. Illustrate with a brief outline of how an arbitrary two-qubit unitary can be synthesized using these primitives.
Universality theorem style question: relationship between single-qubit rotations and a two-qubit entangling gate.
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Unit 314 Marks Low Priority
Explain the Euler-angle decomposition of a single-qubit unitary. Show that any single-qubit unitary $U\in\mathrm{U}(2)$ can be expressed as $U=e^{i\alpha}R_{z}(\beta)R_{y}(\gamma)R_{z}(\delta)$ and describe how this decomposition is used to implement arbitrary single-qubit rotations in a quantum circuit.
Standard decomposition question: Euler/Z-Y-Z decomposition of single-qubit unitaries is core technical skill.
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Unit 310 Marks Low Priority
Define the Toffoli (CCNOT) gate and give its action on computational basis states. Outline a circuit decomposition of the Toffoli gate using single-qubit gates and $\mathrm{CNOT}$ gates (no need for exact gate counts, but explain the main idea).
Toffoli (CCNOT) is a reversible classical-controlled gate realized in quantum circuits; implementation using basic gates is often asked.
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Unit 37 Marks Low Priority
State and prove the commutation and anti-commutation relations among the Pauli operators $X$, $Y$, $Z$. Use these relations to show $XZ=-ZX$ and $XY=iZ$ (up to phase), and explain the significance of these phases in circuit identities.
Algebraic properties/commutation relations of Pauli matrices; short proof-style question.
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Unit 314 Marks Low Priority
Given a quantum circuit composed of gates from the set $\{H,\,S,\,T,\,\mathrm{CNOT}\}$, describe a systematic method to simplify the circuit using known identities (e.g., $HSH=S^{\dagger}$ up to global phase, $T^{2}=S$, cancellations of consecutive inverses, and $H\,\mathrm{CNOT}\,H$ transformations). Apply your method to simplify the circuit: first apply $H$ on qubit 1, then $\mathrm{CNOT}$ with control 1 and target 2, then $H$ on qubit 1, and then $S$ on qubit 2.
Circuit simplification and identity application; typical applied question requiring use of gate identities to reduce circuits.
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